- 20 7月, 2020 1 次提交
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由 William Wang 提交于
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- 14 12月, 2019 3 次提交
- 11 12月, 2019 1 次提交
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由 Zihao Yu 提交于
* An instruciton fetch will set the A bit of the PTE, even this instruction will be flushed later due to branch mis-prediction. Although this will not cause correctness issue, it will introduce inconsistent behavior compared with NEMU. * To run DiffTest while testing debian, a solution is to disable updating A bit and D bit in both NOOP and NEMU.
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- 25 11月, 2019 1 次提交
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由 zhangzifei 提交于
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- 24 11月, 2019 8 次提交
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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- 23 11月, 2019 6 次提交
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
change inner pc/target/npc... to VAddrBits(39) && epc/val... keep XLEN, sign-ext-write/cut-off-read && signExt(pc) for difftest && auipc/jal/jalr/ecall use the signExt(pc) && lr/sc don't change && pass busybox
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由 zhangzifei 提交于
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由 zhangzifei 提交于
WIP: add AddrBits(64)/VAddrBits(39)/PAddrBits(32) && change btb/cache tagBits && change tlb ppn2Len. Next: add SimpleBusBundle addr bits param
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- 22 11月, 2019 2 次提交
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由 zhangzifei 提交于
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由 zhangzifei 提交于
fix bug: when write-tlb finish but not out.fire(), mode will change and vmEnable gets false, write will failed && change lsu-exec state machine, write needs resp.fire() to go ahead
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- 21 11月, 2019 2 次提交
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由 zhangzifei 提交于
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由 zhangzifei 提交于
fix bug: pipeline doesn't fit tlb when vmEnble turns from 0 to 1. add to vmEnable signal to new PipelineConnectTLB
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- 20 11月, 2019 3 次提交
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由 zhangzifei 提交于
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由 zhangzifei 提交于
cancel fu.tlb, move sfence_vma decode to fu.mou && cancel TLBEXUIO, turn to BoringUtils.addSink/addSource
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由 zhangzifei 提交于
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- 19 11月, 2019 2 次提交
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由 zhangzifei 提交于
fix bug: disable cache-write-resp-valid in TLB && xv6: now arrive usertests.test-reparent2, keep Flush-I and never stop
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由 zhangzifei 提交于
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- 18 11月, 2019 8 次提交
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由 zhangzifei 提交于
add PipelineConnect for request && add register to keep metas/datas && cputest/microbenc-test pass, but ipc is low
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由 William Wang 提交于
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由 zhangzifei 提交于
fix bug(NoSuchElementFault: None.get): turn TLBMeta&TLBMeta from Bundle to Module, and change their io methods
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由 William Wang 提交于
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由 zhangzifei 提交于
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由 zhangzifei 提交于
cache: rm ipf, ipf will not get in icache && ifu: add io port ipf && noop: change to new tlb && only draft and syntax bug unchecked
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由 zhangzifei 提交于
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由 zhangzifei 提交于
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- 17 11月, 2019 1 次提交
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由 zhangzifei 提交于
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- 15 11月, 2019 1 次提交
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由 William Wang 提交于
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- 13 11月, 2019 1 次提交
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由 William Wang 提交于
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