* WaitTable: add waittable framework

* WaitTable: get replay info from RedirectGenerator

* StoreQueue: maintain issuePtr for load rs

* RS: add loadWait to rs (only for load Unit's rs)

* WaitTable: fix update logic

* StoreQueue: fix issuePtr update logic

* chore: set loadWaitBit in ibuffer

* StoreQueue: fix issuePtrExt update logic

Former logic does not work well with mmio logic

We may also make sure that issuePtrExt is not before cmtPtrExt

* WaitTable: write with priority

* StoreQueue: fix issuePtrExt update logic for mmio

* chore: fix typos

* CSR: add slvpredctrl

* slvpredctrl will control load violation predict micro architecture

* WaitTable: use xor folded pc to index waittable
Co-authored-by: NZhangZifei <1773908404@qq.com>

* intWb: set wb.valid when !fpwen to allow writeback if !fpwen and !rfwen

* RS: pass ExuConfigs instead of wake-up port number to rs

* ci: add mcf, xalancbmk, gcc and namd to CI for performance test

* ram: change default dram model to DRAMsim3 model

* RS: store's rs's base-src dont care fp wake-up

* update default configurations

* rs: fix replay delay to avoid deadlock

* load: fix tlb feedback

* update default configurations

* intWb: set wb.valid when !fpwen to allow writeback if !fpwen and !rfwen

* rs: fix replay delay to avoid deadlock

* load: fix tlb feedback

* RS: pass ExuConfigs instead of wake-up port number to rs

* RS: store's rs's base-src dont care fp wake-up

* Backend: fix some bugs related to exu write

* Roq: revert to perv verision

* Fix fp write back bugs

* LSQ: use async vaddrModule

* StoreQueue: opt mmio writeback valid timing

* LSQ: opt vaddr read ptr gen timing

* chore: remove unnecessary script

* csr: add sbpctrl to control branch predictors

* bpu: add dynamic switch to each predictor

* csr: change spfctl and sbpctl address

* bpu: fix s3 connections
Co-authored-by: NYinan Xu <xuyinan1997@gmail.com>

Co-authored-by: NYinan Xu <xuyinan1997@gmail.com>

perf: Add perf counters for bpu

Optimize l1plus Cache and L1plus prefetcher timing.

perf: support pf-cnt dump & clean

First latch and then decode for timing consideration.

fix conflict for l1plusprefetcher

add enable IO for prefetcher and move L2 prefetcher to SoC

bug dcache deadlock