提交 efb54949 编写于 作者: Y Yinan Xu

test,ram: set default memory access latency to 90 cycles

上级 9f842a1a
......@@ -157,7 +157,7 @@ void init_ram(const char *img) {
#endif
assert(dram == NULL);
// dram = new ComplexCoDRAMsim3(DRAMSIM3_CONFIG, DRAMSIM3_OUTDIR);
dram = new SimpleCoDRAMsim3(10);
dram = new SimpleCoDRAMsim3(90);
#endif
pthread_mutex_init(&ram_mutex, 0);
......
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