Set Roq size to 128

e5878226 · LinJiawei · 97e5e487 · e5878226
隐藏空白更改
内联并排

Showing with 1 addition and 1 deletion

src/main/scala/xiangshan/XSCore.scala src/main/scala/xiangshan/XSCore.scala +1 -1

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--- a/src/main/scala/xiangshan/XSCore.scala
+++ b/src/main/scala/xiangshan/XSCore.scala
@@ -48,7 +48,7 @@ trait HasXSParameter {
  val PhyRegIdxWidth = log2Up(NRPhyRegs)
  val NRReadPorts = 14
  val NRWritePorts = 8
-  val RoqSize = 32
+  val RoqSize = 128
  val InnerRoqIdxWidth = log2Up(RoqSize)
  val RoqIdxWidth = InnerRoqIdxWidth + 1
  val IntDqDeqWidth = 4