bpu: bypass uftb prediction directly to composer to avoid potential long wires

src/main/scala/xiangshan/frontend/BPU.scala

@@ -186,6 +186,7 @@ abstract class BasePredictor(implicit p: Parameters) extends XSModule
   with HasBPUConst with BPUUtils with HasPerfEvents {
   val meta_size = 0
   val spec_meta_size = 0
+  val is_fast_pred = false
   val io = IO(new BasePredictorIO())
 
   io.out := io.in.bits.resp_in(0)

src/main/scala/xiangshan/frontend/Composer.scala

@@ -27,6 +27,14 @@ import utils._
 class Composer(implicit p: Parameters) extends BasePredictor with HasBPUConst with HasPerfEvents {
   val (components, resp) = getBPDComponents(io.in.bits.resp_in(0), p)
   io.out := resp
+  // shorter path for s1 pred
+  val all_fast_pred = components.filter(_.is_fast_pred)
+  require(all_fast_pred.length <= 1)
+  if (all_fast_pred.length == 1) {
+    val fast_pred = all_fast_pred(0)
+    println("[composer] bypassing output of fast pred: " + fast_pred.name)
+    io.out.s1 := fast_pred.io.out.s1
+  }
 
   var metas = 0.U(1.W)
   var meta_sz = 0
@@ -55,6 +63,7 @@ class Composer(implicit p: Parameters) extends BasePredictor with HasBPUConst wi
   }
   println(s"total meta size: $meta_sz\n\n")
 
+
   io.in.ready := components.map(_.io.s1_ready).reduce(_ && _)
 
   io.s1_ready := components.map(_.io.s1_ready).reduce(_ && _)

src/main/scala/xiangshan/frontend/FauFTB.scala

@@ -83,6 +83,7 @@ class FauFTB(implicit p: Parameters) extends BasePredictor with FauFTBParams {
   }
   val resp_meta = Wire(new FauFTBMeta)
   override val meta_size = resp_meta.getWidth
+  override val is_fast_pred = true