DcacheWrapper: fix syntax bug

999f1e14 · linjiawei · 614812a0 · 999f1e14
隐藏空白更改
内联并排

Showing with 3 addition and 3 deletion

src/main/scala/xiangshan/cache/dcacheWrapper.scala src/main/scala/xiangshan/cache/dcacheWrapper.scala +3 -3

未找到文件。
--- a/src/main/scala/xiangshan/cache/dcacheWrapper.scala
+++ b/src/main/scala/xiangshan/cache/dcacheWrapper.scala
@@ -158,9 +158,9 @@ class DCacheImp(outer: DCache) extends LazyModuleImp(outer) with HasDCacheParame

  missQueue.io.meta_resp <> metaArray.io.resp(0)
  // metaArray.io.resp(0) <> prober.io.meta_resp
-  metaArray.io.resp(0) <> stu.io.meta_resp
-  metaArray.io.resp(0) <> ldu(0).io.meta_resp
-  metaArray.io.resp(0) <> misc.io.meta_resp
+  stu.io.meta_resp <> metaArray.io.resp(0)
+  ldu(0).io.meta_resp <> metaArray.io.resp(0)
+  misc.io.meta_resp <> metaArray.io.resp(0)

  for (w <- 1 until LoadPipelineWidth) {
    metaArray.io.read(w) <> ldu(w).io.meta_read