decode: change FuOpType to 6bits

src/main/scala/xiangshan/backend/decode/DecodeUnit.scala

@@ -8,16 +8,12 @@ package xiangshan.backend.decode
 import chisel3._
 import chisel3.util._
 
-import freechips.rocketchip.config.Parameters
-import freechips.rocketchip.rocket.{RVCDecoder, ExpandedInstruction}
-import freechips.rocketchip.rocket.{CSR,Causes}
 import freechips.rocketchip.util.{uintToBitPat,UIntIsOneOf}
 
 import xiangshan._
 import utils._
 import xiangshan.backend._
 import xiangshan.backend.decode.Instructions._
-import freechips.rocketchip.tile.RocketTile
 
 /**
  * Abstract trait giving defaults and other relevant values to different Decode constants/

src/main/scala/xiangshan/backend/exu/Exu.scala

@@ -30,7 +30,7 @@ case class ExuParameters
 
   def NRFuType = 9
 
-  def FuOpWidth = 7
+  def FuOpWidth = 6
 }
 
 case class ExuConfig

src/main/scala/xiangshan/package.scala

@@ -33,10 +33,10 @@ package object xiangshan {
     def jmp          = "b0000".U
     def i2f          = "b0001".U
     def csr          = "b0010".U
-    def alu          = "b0011".U
+    def alu          = "b0110".U
     def mul          = "b0100".U
     def div          = "b0101".U
-    def fence        = "b0110".U
+    def fence        = "b0011".U
 
     def fmac         = "b1000".U
     def fmisc        = "b1001".U