ftq: cut redirect path from toIfuReq.valid

src/main/scala/xiangshan/frontend/BPU.scala

@@ -675,6 +675,7 @@ class Predictor(implicit p: Parameters) extends XSModule with HasBPUConst with H
 
   XSPerfAccumulate("s2_redirect", s2_redirect)
   XSPerfAccumulate("s3_redirect", s3_redirect)
+  XSPerfAccumulate("s1_not_valid", !s1_valid)
 
   val perfEvents = predictors.asInstanceOf[Composer].getPerfEvents
   generatePerfEvent()

src/main/scala/xiangshan/frontend/NewFtq.scala

@@ -528,7 +528,7 @@ class Ftq(implicit p: Parameters) extends XSModule with HasCircularQueuePtrHelpe
   }
 
   bpuPtr := bpuPtr + enq_fire
-  ifuPtr := ifuPtr + io.toIfu.req.fire
+  ifuPtr := ifuPtr + (io.toIfu.req.fire && allowToIfu)
 
   // only use ftb result to assign hit status
   when (bpu_s2_resp.valid) {
@@ -570,7 +570,7 @@ class Ftq(implicit p: Parameters) extends XSModule with HasCircularQueuePtrHelpe
   ftq_pc_mem.io.raddr.init.init.last := ifuPtr.value
   ftq_pc_mem.io.raddr.init.last := (ifuPtr+1.U).value
 
-  io.toIfu.req.valid := allowToIfu && entry_fetch_status(ifuPtr.value) === f_to_send && ifuPtr =/= bpuPtr
+  io.toIfu.req.valid := entry_fetch_status(ifuPtr.value) === f_to_send && ifuPtr =/= bpuPtr
   io.toIfu.req.bits.ftqIdx := ifuPtr
   io.toIfu.req.bits.nextStartAddr := update_target(ifuPtr.value)
   io.toIfu.req.bits.ftqOffset := cfiIndex_vec(ifuPtr.value)