SbufferTest: add sequence store req test

src/test/scala/xiangshan/memend/SbufferTest.scala

@@ -42,7 +42,7 @@ class SbufferTest extends FlatSpec
   top.Parameters.set(top.Parameters.debugParameters)
 
 
-  it should "" in {
+  it should "random req" in {
     test(new SbufferWapper{AddSinks()}){ c =>
 
       def store_enq(addr: Seq[UInt], data: Seq[UInt], mask: Seq[UInt]) ={
@@ -70,7 +70,8 @@ class SbufferTest extends FlatSpec
         }
       }
 
-      for(i <- 0 until 1000) {
+      val TEST_SIZE = 100
+      for(i <- 0 until TEST_SIZE) {
         val addr = Seq.fill(StorePipelineWidth)((Random.nextLong() & 0x7ffffffff8L).U)// align to block size
         val data = Seq.fill(StorePipelineWidth)((Random.nextLong() & 0x7fffffffffffffffL).U)
         val mask = Seq.fill(StorePipelineWidth)(0xff.U)
@@ -79,4 +80,44 @@ class SbufferTest extends FlatSpec
       }
     }
   }
+
+  it should "sequence req" in {
+    test(new SbufferWapper{AddSinks()}){ c =>
+
+      def store_enq(addr: Seq[UInt], data: Seq[UInt], mask: Seq[UInt]) = {
+        (0 until StorePipelineWidth).map { i =>
+          c.io.in(i).valid.poke(true.B)
+          c.io.in(i).bits.pokePartial(chiselTypeOf(c.io.in(i).bits).Lit(
+            _.mask -> mask(i),
+            _.addr -> addr(i),
+            _.data -> data(i)
+          ))
+        }
+        c.clock.step(1)
+        for (in <- c.io.in){ in.valid.poke(false.B)}
+      }
+
+      def forward_req_and_resp(addr: Seq[UInt], data: Seq[UInt], mask:Seq[UInt]) = {
+        (0 until LoadPipelineWidth).map{ i =>
+          c.io.forward(i).paddr.poke(addr(i))
+          c.io.forward(i).mask.poke(mask(i))
+          if(c.io.in(i).ready.peek() == true.B) {
+            (0 until 8).map { j =>
+              c.io.forward(i).forwardData(j).expect(data(i)(j * 8 + 7, j * 8))
+            }
+          }
+        }
+      }
+
+      val TEST_SIZE = 100
+      val start_addr = Random.nextLong() & 0x7ffffffff8L
+      for(i <- 0 until TEST_SIZE) {
+        val addr = Seq(((i<<4) + start_addr).U,((i<<4)+8+start_addr).U)
+        val data = Seq.fill(StorePipelineWidth)((Random.nextLong() & 0x7fffffffffffffffL).U)
+        val mask = Seq.fill(StorePipelineWidth)(0xff.U)
+        store_enq(addr, data, mask)
+        forward_req_and_resp(addr, data, mask)
+      }
+    }
+  }
 }