l2tlb: fix bug that sfence fail to flush global sp entries (#1859)

src/main/scala/xiangshan/cache/mmu/PageTableCache.scala

@@ -640,7 +640,7 @@ class PtwCache()(implicit p: Parameters) extends XSModule with HasPtwConst with
 
       when (sfence_dup(0).bits.rs2) {
         // specific leaf of addr && all asid
-        spv := spv & (~VecInit(sp.map(_.hit(sfence_vpn, sfence_dup(0).bits.asid, ignoreAsid = true))).asUInt | spg)
+        spv := spv & (~VecInit(sp.map(_.hit(sfence_vpn, sfence_dup(0).bits.asid, ignoreAsid = true))).asUInt)
       } .otherwise {
         // specific leaf of addr && specific asid
         spv := spv & (~VecInit(sp.map(_.hit(sfence_vpn, sfence_dup(0).bits.asid))).asUInt | spg)