roq,exu: update log content

src/main/scala/xiangshan/backend/exu/Exu.scala

@@ -130,7 +130,7 @@ class WriteBackArbMtoN(m: Int, n: Int) extends XSModule {
   }
 
   for (i <- 0 until n) {
-    XSInfo(io.out(i).valid, "out(%d) pc(0x%x) writebacks 0x%x to pdest(%d) ldest(%d)\n", i.U, io.out(i).bits.data,
-      io.out(i).bits.uop.cf.pc, io.out(i).bits.uop.pdest, io.out(i).bits.uop.ctrl.ldest)
+    XSInfo(io.out(i).valid, "out(%d) pc(0x%x) writebacks 0x%x to pdest(%d) ldest(%d)\n", i.U, io.out(i).bits.uop.cf.pc,
+      io.out(i).bits.data, io.out(i).bits.uop.pdest, io.out(i).bits.uop.ctrl.ldest)
   }
 }

src/main/scala/xiangshan/backend/roq/Roq.scala

@@ -76,7 +76,7 @@ class Roq(implicit val p: XSConfig) extends XSModule {
   val firedWriteback = VecInit((0 until exuConfig.ExuCnt).map(io.exeWbResults(_).fire())).asUInt
   XSInfo(PopCount(firedWriteback) > 0.U, "writebacked %d insts\n", PopCount(firedWriteback))
   for(i <- 0 until exuConfig.ExuCnt){
-    XSInfo(io.exeWbResults(i).valid, "writebacked pc 0x%x wen %d data %d\n", microOp(io.exeWbResults(i).bits.uop.roqIdx).cf.pc,
+    XSInfo(io.exeWbResults(i).valid, "writebacked pc 0x%x wen %d data 0x%x\n", microOp(io.exeWbResults(i).bits.uop.roqIdx).cf.pc,
       microOp(io.exeWbResults(i).bits.uop.roqIdx).ctrl.rfWen, io.exeWbResults(i).bits.data)
   }
 
@@ -107,20 +107,16 @@ class Roq(implicit val p: XSConfig) extends XSModule {
   io.scommit := PopCount(validScommit.asUInt)
 
   XSInfo(retireCounter > 0.U, "retired %d insts\n", retireCounter)
-  XSInfo("")
-  XSInfo(){
-    printf("retired pcs are: ")
-    for(i <- 0 until CommitWidth){
-      when(io.commits(i).valid){ printf("%d: 0x%x ", ringBufferTail+i.U, microOp(ringBufferTail+i.U).cf.pc) }
-    }
-    printf("\n")
+  for(i <- 0 until CommitWidth) {
+      XSInfo(io.commits(i).valid, "retired pc at commmit(%d) is: %d 0x%x\n",
+        i.U, ringBufferTail+i.U, microOp(ringBufferTail+i.U).cf.pc)
   }
 
   val walkFinished = (0 until CommitWidth).map(i => (ringBufferWalk + i.U) === ringBufferWalkTarget).reduce(_||_)
 
-  when(state===s_walk){
+  when(state===s_walk) {
     //exit walk state when all roq entry is commited
-    when(walkFinished){
+    when(walkFinished) {
       state := s_idle
     }
     ringBufferWalkExtended := ringBufferWalkExtended + CommitWidth.U