Merge branch 'master' into ibuf

Makefile

@@ -85,8 +85,12 @@ $(EMU): $(EMU_MK) $(EMU_DEPS) $(EMU_HEADERS) $(REF_SO)
 
 SEED = -s $(shell seq 1 10000 | shuf | head -n 1)
 
+
+B ?= 0
+E ?= -1
+
 emu: $(EMU)
-	@$(EMU) -i $(IMAGE) $(SEED)
+	@$(EMU) -i $(IMAGE) $(SEED) -b $(B) -e $(E)
 
 cache:
 	$(MAKE) emu IMAGE=Makefile

src/main/scala/xiangshan/utils/LogUtils.scala

 package xiangshan.utils
 
 import chisel3._
+import chisel3.util.experimental.BoringUtils
 import xiangshan.HasXSParameter
 import xiangshan.utils.XSLogLevel.XSLogLevel
 
 object XSLogLevel extends Enumeration {
   type XSLogLevel = Value
 
-  val ALL   = Value("ALL")
+  val ALL   = Value("ALL  ")
   val DEBUG = Value("DEBUG")
-  val INFO  = Value("INFO")
-  val WARN  = Value("WARN")
+  val INFO  = Value("INFO ")
+  val WARN  = Value("WARN ")
   val ERROR = Value("ERROR")
-  val OFF   = Value("OFF")
+  val OFF   = Value("OFF  ")
 }
 
-object XSLog extends HasXSParameter{
+object XSLog extends HasXSParameter {
+
+  def displayLog(): Bool = {
+    val disp_begin, disp_end = WireInit(0.U(64.W))
+    BoringUtils.addSink(disp_begin, "DISPALY_LOG_START")
+    BoringUtils.addSink(disp_end, "DISPLAY_LOG_END")
+    assert(disp_begin <= disp_end)
+    (GTimer() >= disp_begin) && (GTimer() <= disp_end)
+  }
+
   def apply(debugLevel: XSLogLevel)
            (cond: Bool, pable: Printable)
            (implicit m: Module): Any = {
     if (debugLevel >= LogLevel) {
-      when (cond) {
+      when (cond && displayLog()) {
         val commonInfo = p"[$debugLevel][time=${GTimer()}] ${m.name}: "
         printf(commonInfo + pable)
       }
@@ -39,7 +49,7 @@ sealed abstract class LogHelper(val logLevel: XSLogLevel) extends HasXSParameter
 
   // Do not use that unless you have valid reasons
   def apply(cond: Bool = true.B)(body: => Unit): Any =
-    if (logLevel >= LogLevel) { when (cond) { body } }
+    if (logLevel >= LogLevel) { when (cond && XSLog.displayLog()) { body } }
 }
 
 object XSDebug extends LogHelper(XSLogLevel.DEBUG)

src/test/csrc/emu.h

@@ -25,6 +25,7 @@ class Emulator {
   // emu control variable
   uint32_t seed;
   uint64_t max_cycles, cycles;
+  uint64_t log_begin, log_end;
 
   std::vector<const char *> parse_args(int argc, const char *argv[]);
 
@@ -55,7 +56,8 @@ class Emulator {
   Emulator(int argc, const char *argv[]):
     image(nullptr),
     dut_ptr(new std::remove_reference<decltype(*dut_ptr)>::type),
-    seed(0), max_cycles(-1), cycles(0)
+    seed(0), max_cycles(-1), cycles(0),
+    log_begin(0), log_end(-1)
   {
     // init emu
     auto args = parse_args(argc, argv);
@@ -65,6 +67,10 @@ class Emulator {
     srand48(seed);
     Verilated::randReset(2);
 
+    // set log time range
+    dut_ptr->io_logCtrl_log_begin = log_begin;
+    dut_ptr->io_logCtrl_log_end = log_end;
+
     // init ram
     extern void init_ram(const char *img);
     init_ram(image);

src/test/csrc/main.cpp

@@ -20,6 +20,8 @@ const struct option Emulator::long_options[] = {
   { "seed",           1, NULL, 's' },
   { "max-cycles",     1, NULL, 'C' },
   { "image",          1, NULL, 'i' },
+  { "log-begin",      1, NULL, 'b'},
+  { "log-end",        1, NULL, 'e'},
   { "help",           0, NULL, 'h' },
   { 0,                0, NULL,  0  }
 };
@@ -30,6 +32,8 @@ void Emulator::print_help(const char *file) {
   printf("  -s, --seed=NUM        use this seed\n");
   printf("  -C, --max-cycles=NUM  execute at most NUM cycles\n");
   printf("  -i, --image=FILE      run with this image file\n");
+  printf("  -b, --log-begin=NUM   display log from NUM th cycle\n");
+  printf("  -e, --log-end=NUM     stop display log at NUM th cycle\n");
   printf("  -h, --help            print program help info\n");
   printf("\n");
 }
@@ -37,7 +41,7 @@ void Emulator::print_help(const char *file) {
 std::vector<const char *> Emulator::parse_args(int argc, const char *argv[]) {
   std::vector<const char *> args = { argv[0] };
   int o;
-  while ( (o = getopt_long(argc, const_cast<char *const*>(argv), "-s:C:hi:m:", long_options, NULL)) != -1) {
+  while ( (o = getopt_long(argc, const_cast<char *const*>(argv), "-s:C:hi:m:b:e:", long_options, NULL)) != -1) {
     switch (o) {
       case 's': 
         if(std::string(optarg) != "NO_SEED") {
@@ -50,6 +54,8 @@ std::vector<const char *> Emulator::parse_args(int argc, const char *argv[]) {
                 args.push_back("-i");
                 args.push_back(optarg);
                 break;
+      case 'b': log_begin = atoll(optarg);  break;
+      case 'e': log_end = atoll(optarg); break;
       default:
                 print_help(argv[0]);
                 exit(0);

src/test/scala/top/XSSim.scala

@@ -27,9 +27,14 @@ class DiffTestIO extends Bundle {
   val scause = Output(UInt(64.W))
 }
 
+class LogCtrlIO extends Bundle {
+  val log_begin, log_end = Input(UInt(32.W))
+}
+
 class XSSimTop extends Module {
   val io = IO(new Bundle{
     val difftest = new DiffTestIO
+    val logCtrl = new LogCtrlIO
   })
 
   lazy val config = XSConfig(FPGAPlatform = false)
@@ -66,6 +71,13 @@ class XSSimTop extends Module {
   BoringUtils.addSink(difftest.mcause, "difftestMcause")
   BoringUtils.addSink(difftest.scause, "difftestScause")
   io.difftest := difftest
+
+  val log_begin, log_end = Wire(UInt(32.W))
+  log_begin := io.logCtrl.log_begin
+  log_end := io.logCtrl.log_end
+
+  BoringUtils.addSource(log_begin, "DISPALY_LOG_START")
+  BoringUtils.addSource(log_end, "DISPLAY_LOG_END")
 }
 
 object TestMain extends App {