- 22 6月, 2013 3 次提交
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由 wuyangyong 提交于
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由 wuyangyong 提交于
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由 wuyangyong 提交于
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- 18 6月, 2013 1 次提交
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由 visitor83 提交于
format the s3c24x0 serial.c and mini2440 rtconfig.py
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- 16 6月, 2013 1 次提交
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由 visitor83 提交于
Signed-off-by: Nvisitor83 <root@wolflouis.(none)>
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- 12 6月, 2013 2 次提交
- 05 6月, 2013 2 次提交
- 31 5月, 2013 4 次提交
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由 Grissiom 提交于
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由 Grissiom 提交于
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT will turn on VFP for all threads and stack all the VFP registers. When doing lazy stacking, VFP will only be turned on for the thread who issued VFP instructions. Currently, if a thread turned on VFP, it cannot be turned off. RTT will never know what time the thread doesn't need VFP any more. The thread might could turn off the VFP for it self in proper time.
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由 Grissiom 提交于
VFP instructions only have IA(Increment After)/DB(Decrement Before) mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
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由 Grissiom 提交于
This support Common VFPv2 sub-architecture.
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- 30 5月, 2013 1 次提交
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由 Grissiom 提交于
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- 29 5月, 2013 1 次提交
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由 Grissiom 提交于
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- 26 5月, 2013 4 次提交
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由 Grissiom 提交于
Use condition flag in the ORR. This could eliminate a BEQ.
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由 Grissiom 提交于
When saving thread registers in context_switch_interrupt_to, we don't change them, just move them. So there is no need to always r0-r3 from stack to the real r0-r3. So just use the intermediate registers and eliminate 2 MOV.
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由 Grissiom 提交于
Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction. Tested on board and it works like a charm.
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由 Grissiom 提交于
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- 24 5月, 2013 1 次提交
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由 Grissiom 提交于
We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.
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- 10 4月, 2013 1 次提交
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由 yiyue.fang 提交于
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- 08 4月, 2013 1 次提交
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由 weety 提交于
Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication.
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- 02 4月, 2013 4 次提交
- 31 3月, 2013 6 次提交
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由 wuyangyong 提交于
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由 weety 提交于
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由 wuyangyong 提交于
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由 wuyangyong 提交于
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由 wuyangyong 提交于
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由 wuyangyong 提交于
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- 30 3月, 2013 1 次提交
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由 Bernard Xiong 提交于
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- 26 3月, 2013 1 次提交
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由 Bernard Xiong 提交于
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- 24 3月, 2013 1 次提交
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由 weety 提交于
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- 23 3月, 2013 1 次提交
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由 Bernard Xiong 提交于
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- 19 3月, 2013 3 次提交
- 20 2月, 2013 1 次提交
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由 wuyangyong 提交于
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