提交 f15ac580 编写于 作者: X Xu, Anthony 提交者: Tony Luck

[IA64] pal cache flush patch

Because PAL spec has changed since 2002, you can goto
http://developer.intel.com/design/itanium/manuals/iiasdmanual.htm to
download new SDM, all PAL calls should be invoked with psr.ic=1, and
it's caller's responsibility to handle possible tlb miss.
Ia64_pal_cache_flush was written according to old spec, it is obsolete,
and this patch has ia64_pal_cache_flush conform to new spec.

Signed-off-by Anthony Xu <anthony.xu@intel.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
上级 7b9c8ba2
...@@ -927,7 +927,7 @@ static inline s64 ...@@ -927,7 +927,7 @@ static inline s64
ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector) ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector)
{ {
struct ia64_pal_retval iprv; struct ia64_pal_retval iprv;
PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress);
if (vector) if (vector)
*vector = iprv.v0; *vector = iprv.v0;
*progress = iprv.v1; *progress = iprv.v1;
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册