From f15ac5801fdc1b217c3b8b5dbc63a09371d2ee4d Mon Sep 17 00:00:00 2001 From: "Xu, Anthony" Date: Mon, 9 Jan 2006 10:36:35 +0800 Subject: [PATCH] [IA64] pal cache flush patch Because PAL spec has changed since 2002, you can goto http://developer.intel.com/design/itanium/manuals/iiasdmanual.htm to download new SDM, all PAL calls should be invoked with psr.ic=1, and it's caller's responsibility to handle possible tlb miss. Ia64_pal_cache_flush was written according to old spec, it is obsolete, and this patch has ia64_pal_cache_flush conform to new spec. Signed-off-by Anthony Xu Signed-off-by: Tony Luck --- include/asm-ia64/pal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index e828377ad295..7708ec669a33 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -927,7 +927,7 @@ static inline s64 ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector) { struct ia64_pal_retval iprv; - PAL_CALL_IC_OFF(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); + PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); if (vector) *vector = iprv.v0; *progress = iprv.v1; -- GitLab