ch569w-evt: add usbhs device mode driver (#6330)

ch569w-evt: add usbhs device mode driver

* usbd driver tested with cdc_vcom, internal loopback
  (can't run both MSH & usbd due to 16KB RAM limitation)
* reduce usrstack & main thread stack size for usbd test
* ch56x_uart.c : iron out UART0_PIN_ALT assignment

bsp/wch/risc-v/Libraries/ch56x_drivers/SConscript

@@ -12,6 +12,9 @@ if GetDepend('SOC_SERIES_CH569'):
     if GetDepend('RT_USING_WDT'):
         src += ['ch56x_wdt.c']
 
+if GetDepend('RT_USING_USB_DEVICE'):
+    src += ['ch56x_usbd.c']
+
 if GetDepend('RT_USING_PWM'):
     src += ['ch56x_pwm.c']
 

bsp/wch/risc-v/Libraries/ch56x_drivers/ch56x_uart.c

@@ -45,8 +45,13 @@ static struct serial_device serial_device_0 =
 {
     .reg_base = (struct uart_registers *)UART0_REG_BASE,
     .irqn = UART0_IRQn,
+#ifndef BSP_USING_UART0_PIN_ALT
     .rxd_pin = UART_RXD0_PIN,
     .txd_pin = UART_TXD0_PIN,
+#else
+    .rxd_pin = UART_RXD0_ALT,
+    .txd_pin = UART_TXD0_ALT,
+#endif
     .name = "uart0",
 };
 #endif
@@ -250,22 +255,13 @@ int rt_hw_uart_init(void)
 
     while (--n >= 0)
     {
-        uint32_t flag, txd_pin, rxd_pin;
+        uint32_t flag;
         struct serial_device *serial = devices[n];
         serial->parent.ops = &uart_ops;
         serial->parent.config = config;
 
-        txd_pin = serial->txd_pin;
-        rxd_pin = serial->rxd_pin;
-#ifdef BSP_USING_UART0_PIN_ALT
-        if (serial->irqn == UART0_IRQn)
-        {
-            txd_pin = UART_TXD0_ALT;
-            rxd_pin = UART_RXD0_ALT;
-        }
-#endif
-        rt_pin_mode(txd_pin, PIN_MODE_OUTPUT);
-        rt_pin_mode(rxd_pin, PIN_MODE_INPUT_PULLUP);
+        rt_pin_mode(serial->txd_pin, PIN_MODE_OUTPUT);
+        rt_pin_mode(serial->rxd_pin, PIN_MODE_INPUT_PULLUP);
 
         sys_clk_off_by_irqn(serial->irqn, SYS_SLP_CLK_ON);
 

bsp/wch/risc-v/Libraries/ch56x_drivers/ch56x_usbd.c

+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2022-08-22     Emuzit            first version
+ */
+#include <rthw.h>
+#include <rtdebug.h>
+#include <drivers/usb_common.h>
+#include <drivers/usb_device.h>
+#include "ch56x_usbhs.h"
+#include "ch56x_sys.h"
+#include "isr_sp.h"
+
+/*--------------------------------------------------------*/
+/* Warning : Not fully tested, use at your own discretion */
+/*--------------------------------------------------------*/
+
+#ifdef SOC_SERIES_CH569
+#define _attr_uepdma        __attribute__((section(".dmadata"), aligned(16)))
+#define _ep0_setup_dmabuf   _dmadata_start
+#else
+#define _attr_uepdma        __attribute__((aligned(4)))
+#define _ep0_setup_dmabuf   _dmadata_start
+#define usbhs_irq_handler   usb1_irq_handler
+#define USBHS_IRQn          USB1_IRQn
+#define USBHS_REG_BASE      USB1_REG_BASE
+#define RAMX_BASE_ADDRESS   RAMS_BASE_ADDRESS
+#define UEP0_RT_DMA         UEP_DMA[0]
+#endif
+
+#define UEP_MPS_64          64
+#define UEP_MPS_512         512
+
+#define _get_ep_idx(address)    ((address) & USB_EPNO_MASK)
+#define _get_ep_dir(address)    ((address) & USB_DIR_MASK)
+
+#define uep_dir_is_in(address)  (_get_ep_dir(address) == USB_DIR_IN)
+#define uep_dir_is_out(address) (_get_ep_dir(address) == USB_DIR_OUT)
+
+extern uint32_t _dmadata_start[];
+
+static uint32_t ep0_dmabuf[UEP_MPS_64 / 4] _attr_uepdma;
+static uint32_t epx_dmabuf[UEP_ADDRESS_MAX][UEP_MPS_512 / 4] _attr_uepdma;
+
+static struct ep_id usbhs_ep_pool[] =
+{
+    {0x0,  USB_EP_ATTR_CONTROL,   USB_DIR_INOUT, 64,  ID_ASSIGNED},
+    {0x1,  USB_EP_ATTR_BULK,      USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x1,  USB_EP_ATTR_BULK,      USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x2,  USB_EP_ATTR_INT,       USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x2,  USB_EP_ATTR_INT,       USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x3,  USB_EP_ATTR_BULK,      USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x3,  USB_EP_ATTR_BULK,      USB_DIR_OUT,   512, ID_UNASSIGNED},
+#ifdef SOC_SERIES_CH569
+    /* FIXME: not sure how to deal with EP4, no UEP4_DMA register */
+    {0x4,  USB_EP_ATTR_INT,       USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x4,  USB_EP_ATTR_INT,       USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x5,  USB_EP_ATTR_BULK,      USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x5,  USB_EP_ATTR_BULK,      USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x6,  USB_EP_ATTR_INT,       USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x6,  USB_EP_ATTR_INT,       USB_DIR_OUT,   512, ID_UNASSIGNED},
+    {0x7,  USB_EP_ATTR_BULK,      USB_DIR_IN,    512, ID_UNASSIGNED},
+    {0x7,  USB_EP_ATTR_BULK,      USB_DIR_OUT,   512, ID_UNASSIGNED},
+#endif
+    {0xff, USB_EP_ATTR_TYPE_MASK, USB_DIR_MASK,  0,   ID_ASSIGNED},
+};
+
+static struct udcd udc_device;
+
+static uint8_t setup_set_address;
+
+static rt_err_t udc_set_address(uint8_t address)
+{
+    /* DEV_AD should be updated after status stage IN token of SET_ADDRESS
+     * such that that IN token could still reach our device.
+    */
+    setup_set_address = address | 0x80;
+    return RT_EOK;
+}
+
+static rt_err_t udc_set_config(uint8_t address)
+{
+    return RT_EOK;
+}
+
+static rt_err_t udc_ep_set_stall(uint8_t address)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (uep_dir_is_in(address))
+        usbhs->UEP_CTRL[ep_idx].TX_CTRL.res_mask = UEP_RES_STALL;
+    else
+        usbhs->UEP_CTRL[ep_idx].RX_CTRL.res_mask = UEP_RES_STALL;
+
+    return RT_EOK;
+}
+
+static rt_err_t udc_ep_clear_stall(uint8_t address)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    if (uep_dir_is_in(address))
+        usbhs->UEP_CTRL[ep_idx].TX_CTRL.res_mask = UEP_RES_NAK;
+    else
+        usbhs->UEP_CTRL[ep_idx].RX_CTRL.res_mask = UEP_RES_NAK;
+
+    return RT_EOK;
+}
+
+static rt_err_t udc_ep_enable(struct uendpoint *ep)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx, address, mod;
+
+    RT_ASSERT(ep != RT_NULL);
+    RT_ASSERT(ep->ep_desc != RT_NULL);
+
+    address = EP_ADDRESS(ep);
+    ep_idx = _get_ep_idx(address);
+
+    if (ep_idx > 0 && ep_idx <= UEP_ADDRESS_MAX)
+    {
+        mod = uep_dir_is_in(address) ? RB_UEP_TX_EN : RB_UEP_RX_EN;
+        mod = _uep_mod_get(usbhs, ep_idx) | mod;
+        _uep_mod_set(usbhs, ep_idx, mod);
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t udc_ep_disable(struct uendpoint *ep)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx, address, mod;
+
+    RT_ASSERT(ep != RT_NULL);
+    RT_ASSERT(ep->ep_desc != RT_NULL);
+
+    address = EP_ADDRESS(ep);
+    ep_idx = _get_ep_idx(address);
+
+    if (ep_idx > 0 && ep_idx <= UEP_ADDRESS_MAX)
+    {
+        mod = uep_dir_is_in(address) ? RB_UEP_TX_EN : RB_UEP_RX_EN;
+        mod = _uep_mod_get(usbhs, ep_idx) & ~mod;
+        _uep_mod_set(usbhs, ep_idx, mod);
+    }
+
+    return RT_EOK;
+}
+
+static rt_size_t udc_ep_read_prepare(uint8_t address, void *buffer, rt_size_t size)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    uint32_t dmabuf = (uint32_t)buffer;
+
+    if (uep_dir_is_in(address))
+        return 0;
+
+    if (size > (ep_idx ? UEP_MPS_512 : UEP_MPS_64))
+        size = (ep_idx ? UEP_MPS_512 : UEP_MPS_64);
+
+    /* need extra `buffer` copy if H/W requirement not met
+     *   CH565/CH569 : DMA buffer resides in RAMX, 16-byte aligned
+     *   CH567/CH568 : 4-byte aligned
+     */
+#ifdef SOC_SERIES_CH569
+    if (size > 0 && (dmabuf < RAMX_BASE_ADDRESS || (dmabuf & 0xf)))
+    {
+        dmabuf = (uint32_t)(ep_idx ? epx_dmabuf[ep_idx] : ep0_dmabuf);
+    }
+    /* Note : usbhs->UEP_RX_DMA[0] maps to usbhs->UEP0_RT_DMA actually */
+    usbhs->UEP_RX_DMA[ep_idx] = dmabuf & UEP_RT_DMA_MASK;
+#else
+    if (size > 0 && (dmabuf & 3))
+    {
+        dmabuf = (uint32_t)(ep_idx ? epx_dmabuf[ep_idx] : ep0_dmabuf);
+    }
+    usbhs->UEP_DMA[ep_idx] = dmabuf & UEP_RT_DMA_MASK;
+#endif
+
+    if (ep_idx == 0 && size == 0)
+    {
+        /* SETUP status stage, expect DATA1 */
+        usbhs->UEP_CTRL[0].RX_CTRL.reg = RB_UEP_RES_ACK | RB_UEP_TOG_DATA1;
+    }
+    else
+    {
+        /* keep TOG_MASK & AUTOTOG */
+        usbhs->UEP_CTRL[ep_idx].RX_CTRL.res_mask = UEP_RES_ACK;
+    }
+
+    return size;
+}
+
+static rt_size_t udc_ep_read(uint8_t address, void *buffer)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    uint32_t dmabuf;
+    rt_size_t size;
+
+    if (uep_dir_is_in(address))
+        return 0;
+
+#ifdef SOC_SERIES_CH569
+    /* Note : usbhs->UEP_RX_DMA[0] maps to usbhs->UEP0_RT_DMA actually */
+    dmabuf = usbhs->UEP_RX_DMA[ep_idx] & UEP_RT_DMA_MASK;
+#else
+    dmabuf = usbhs->UEP_DMA[ep_idx] & UEP_RT_DMA_MASK;
+#endif
+    size = usbhs->RX_LEN;
+
+    /* copy if proxy buffer */
+    if (size > 0 && ((uint32_t)buffer & UEP_RT_DMA_MASK) != dmabuf)
+    {
+        dmabuf |= RAMX_BASE_ADDRESS;
+        rt_memcpy(buffer, (void *)dmabuf, size);
+    }
+
+    return size;
+}
+
+static rt_size_t udc_ep_write(uint8_t address, void *buffer, rt_size_t size)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    uint8_t ep_idx = _get_ep_idx(address);
+
+    uint32_t dmabuf = (uint32_t)buffer;
+
+    union _uh_rt_ctrl ctrl;
+
+    if (uep_dir_is_out(address))
+        return 0;
+
+    if (size > (ep_idx ? UEP_MPS_512 : UEP_MPS_64))
+        size = (ep_idx ? UEP_MPS_512 : UEP_MPS_64);
+
+    /* need extra `buffer` copy if H/W requirement not met
+     *   CH565/CH569 : DMA buffer resides in RAMX, 16-byte aligned
+     *   CH567/CH568 : 4-byte aligned
+     */
+#ifdef SOC_SERIES_CH569
+    if (size > 0 && (dmabuf < RAMX_BASE_ADDRESS || (dmabuf & 0xf)))
+    {
+        dmabuf = (uint32_t)(ep_idx ? epx_dmabuf[ep_idx] : ep0_dmabuf);
+        rt_memcpy((void *)dmabuf, buffer, size);
+    }
+    if (ep_idx == 0)
+        usbhs->UEP0_RT_DMA = dmabuf & UEP_RT_DMA_MASK;
+    else
+        usbhs->UEP_TX_DMA[ep_idx] = dmabuf & UEP_RT_DMA_MASK;
+#else
+    if (size > 0 && (dmabuf & 3))
+    {
+        dmabuf = (uint32_t)(ep_idx ? epx_dmabuf[ep_idx] : ep0_dmabuf);
+        rt_memcpy((void *)dmabuf, buffer, size);
+    }
+    usbhs->UEP_DMA[ep_idx] = dmabuf & UEP_RT_DMA_MASK;
+#endif
+    usbhs->UEP_CTRL[ep_idx].t_len = size;
+
+    /* keep TOG_MASK & AUTOTOG */
+    usbhs->UEP_CTRL[ep_idx].TX_CTRL.res_mask = UEP_RES_ACK;
+
+    return size;
+}
+
+static rt_err_t udc_ep0_send_status(void)
+{
+    volatile struct usbhs_registers *usbhs = (void *)USBHS_REG_BASE;
+
+    /* SETUP status stage : zero data length, always DATA1 */
+    usbhs->UEP_CTRL[0].t_len = 0;
+    /* This is the only case UEP0_RT_DMA is set to 0. */
+    usbhs->UEP0_RT_DMA = 0;
+    usbhs->UEP_CTRL[0].TX_CTRL.reg = RB_UEP_RES_ACK | RB_UEP_TOG_DATA1;
+    return RT_EOK;
+}
+
+static rt_err_t udc_suspend(void)
+{
+    return RT_EOK;
+}
+
+static rt_err_t udc_wakeup(void)
+{
+    return RT_EOK;
+}
+
+static const struct udcd_ops udcd_ops =
+{
+    .set_address = udc_set_address,
+    .set_config = udc_set_config,
+    .ep_set_stall = udc_ep_set_stall,
+    .ep_clear_stall = udc_ep_clear_stall,
+    .ep_enable = udc_ep_enable,
+    .ep_disable = udc_ep_disable,
+    .ep_read_prepare = udc_ep_read_prepare,
+    .ep_read = udc_ep_read,
+    .ep_write = udc_ep_write,
+    .ep0_send_status = udc_ep0_send_status,
+    .suspend = udc_suspend,
+    .wakeup = udc_wakeup,
+};
+
+static void _hsbhs_device_mode_init(volatile struct usbhs_registers *usbhs)
+{
+    uint8_t ep_idx;
+
+    /* disable all endpoints, use single buffer mode (BUF_MOD : 0) */
+    usbhs->UHOST_CTRL.reg = 0;
+    usbhs->SUSPEND.reg = 0;
+    usbhs->R32_UEP_MOD = 0;
+    usbhs->DEV_AD = 0;
+
+    usbhs->CTRL.reg = RB_USB_RESET_SIE | RB_USB_CLR_ALL;
+    usbhs->CTRL.reg = RB_USB_DEVICE_MODE |
+                      RB_SPTP_HIGH_SPEED |
+                      RB_DEV_PU_EN |
+                      RB_USB_INT_BUSY |
+                      RB_USB_DMA_EN;
+
+    usbhs->INT_EN.reg = RB_USB_IE_BUSRST |
+                        RB_USB_IE_TRANS |
+                        RB_USB_IE_FIFOOV |
+                        RB_USB_IE_SETUPACT;
+
+    usbhs->UEP_MAX_LEN[0].reg = UEP_MPS_64;
+    /*
+     * It seems EP0 SETUP uses the first 8 bytes of RAMX as dmabuf and
+     * handles DATA0 transfer & ACK on its own. Here we still needs to
+     * RES_NAK TX/RX to block SETUP data stage till dma data is ready.
+     */
+    usbhs->UEP_CTRL[0].TX_CTRL.reg = RB_UEP_RES_NAK | RB_UEP_TOG_DATA1;
+    usbhs->UEP_CTRL[0].RX_CTRL.reg = RB_UEP_RES_NAK | RB_UEP_TOG_DATA1;
+
+    for (ep_idx = 1; ep_idx <= UEP_ADDRESS_MAX; ep_idx++)
+    {
+        usbhs->UEP_MAX_LEN[ep_idx].reg = UEP_MPS_512;
+        /* set to DATA0, remains to be initialized (SET_CONFIGURATION...) */
+        usbhs->UEP_CTRL[ep_idx].TX_CTRL.reg = RB_UEP_RES_NAK | RB_UEP_AUTOTOG;
+        usbhs->UEP_CTRL[ep_idx].RX_CTRL.reg = RB_UEP_RES_NAK | RB_UEP_AUTOTOG;
+    }
+}
+
+static rt_err_t udc_device_init(struct rt_device *device)
+{
+    volatile struct usbhs_registers *usbhs = device->user_data;
+
+    sys_clk_off_by_irqn(USBHS_IRQn, SYS_SLP_CLK_ON);
+
+    _hsbhs_device_mode_init(usbhs);
+
+    rt_hw_interrupt_umask(USBHS_IRQn);
+
+    return RT_EOK;
+}
+
+#ifdef RT_USING_DEVICE_OPS
+static struct rt_device_ops device_ops;
+#endif
+
+static int rt_hw_usbd_init(void)
+{
+    int ret;
+
+    udc_device.parent.type = RT_Device_Class_USBDevice;
+#ifdef RT_USING_DEVICE_OPS
+    device_ops.init = udc_device_init;
+    udc_device.parent.ops = &device_ops;
+#else
+    udc_device.parent.init = udc_device_init;
+#endif
+    udc_device.parent.user_data = (void *)USBHS_REG_BASE;
+    udc_device.ops = &udcd_ops;
+    udc_device.ep_pool = usbhs_ep_pool;
+    udc_device.ep0.id = &usbhs_ep_pool[0];
+    udc_device.device_is_hs = RT_TRUE;
+
+    ret = rt_device_register(&udc_device.parent, "usbd", 0);
+    if (ret == RT_EOK)
+        ret = rt_usb_device_init();
+
+    return ret;
+}
+INIT_DEVICE_EXPORT(rt_hw_usbd_init);
+
+rt_inline uint8_t _uep_tog_datax(uint8_t tog)
+{
+    /* Note: treat tog as RB_UEP_TOG_DATA0 if not RB_UEP_TOG_DATA1 */
+    return (tog == RB_UEP_TOG_DATA1) ? RB_UEP_TOG_DATA0 : RB_UEP_TOG_DATA1;
+}
+
+static void _isr_ep_stall(volatile struct usbhs_registers *usbhs)
+{
+    uint8_t ep_idx = usbhs->INT_ST.dev_endp_mask;
+
+    usbhs->UEP_CTRL[ep_idx].TX_CTRL.res_mask == UEP_RES_STALL;
+    usbhs->UEP_CTRL[ep_idx].RX_CTRL.res_mask == UEP_RES_STALL;
+}
+
+static void _isr_handle_setup(volatile struct usbhs_registers *usbhs)
+{
+    struct urequest setup, *packet;
+
+    uint8_t ep_idx, xctrl, recipient;
+
+    /* RES_NAK to block data stage, will expect or response DATA1 */
+    usbhs->UEP_CTRL[0].TX_CTRL.reg = RB_UEP_RES_NAK | RB_UEP_TOG_DATA1;
+    usbhs->UEP_CTRL[0].RX_CTRL.reg = RB_UEP_RES_NAK | RB_UEP_TOG_DATA1;
+
+    packet = (struct urequest *)_ep0_setup_dmabuf;
+
+    setup.request_type = packet->request_type;
+    setup.bRequest = packet->bRequest;
+    setup.wValue = packet->wValue;
+    setup.wIndex = packet->wIndex;
+    setup.wLength = packet->wLength;
+
+    /* Init data toggle bit. Not sure if it has been done by h/w.*/
+    xctrl = RB_UEP_RES_NAK | RB_UEP_AUTOTOG | RB_UEP_TOG_DATA0;
+    recipient = setup.request_type & USB_REQ_TYPE_RECIPIENT_MASK;
+    if (recipient == USB_REQ_TYPE_DEVICE &&
+        setup.bRequest == USB_REQ_SET_CONFIGURATION)
+    {
+        for (ep_idx = 1; ep_idx <= UEP_ADDRESS_MAX; ep_idx++)
+        {
+            usbhs->UEP_CTRL[ep_idx].TX_CTRL.reg = xctrl;
+            usbhs->UEP_CTRL[ep_idx].RX_CTRL.reg = xctrl;
+        }
+    }
+    else if (recipient == USB_REQ_TYPE_ENDPOINT &&
+             setup.bRequest == USB_REQ_CLEAR_FEATURE &&
+             setup.wValue == USB_EP_HALT)
+    {
+        ep_idx = setup.wIndex;
+        if (ep_idx > 0 && ep_idx <= UEP_ADDRESS_MAX)
+        {
+            usbhs->UEP_CTRL[ep_idx].TX_CTRL.reg = xctrl;
+            usbhs->UEP_CTRL[ep_idx].RX_CTRL.reg = xctrl;
+        }
+    }
+
+    rt_usbd_ep0_setup_handler(&udc_device, &setup);
+}
+
+static void _isr_handle_transfer(volatile struct usbhs_registers *usbhs)
+{
+    rt_size_t size;
+
+    uint8_t ep_idx, token, tog;
+
+    ep_idx = usbhs->INT_ST.dev_endp_mask;
+    token = usbhs->INT_ST.dev_token_mask;
+
+    if (ep_idx == 0)
+    {
+        if (token == DEV_TOKEN_IN)
+        {
+            /* UEP0 does not support AUTOTOG, generate DATAx manually */
+            tog = usbhs->UEP_CTRL[0].TX_CTRL.reg & RB_UEP_TOG_MASK;
+            tog = _uep_tog_datax(tog);
+            /* wait for udc_ep_write or udc_ep0_send_status to RES_ACK */
+            usbhs->UEP_CTRL[0].TX_CTRL.reg = RB_UEP_RES_NAK | tog;
+
+            if (setup_set_address != 0 && usbhs->UEP_CTRL[0].t_len == 0)
+            {
+                usbhs->DEV_AD = setup_set_address & 0x7f;
+                setup_set_address = 0;
+            }
+            /* don't call in_handler if send_status */
+            if (usbhs->UEP0_RT_DMA != 0)
+            {
+                rt_usbd_ep0_in_handler(&udc_device);
+            }
+        }
+        else if (token == DEV_TOKEN_OUT)
+        {
+            if (usbhs->INT_ST.st_togok)
+            {
+                /* UEP0 does not support AUTOTOG, generate DATAx manually */
+                tog = usbhs->UEP_CTRL[0].RX_CTRL.reg & RB_UEP_TOG_MASK;
+                tog = _uep_tog_datax(tog);
+                /* wait for udc_ep_read_prepare to RES_ACK */
+                usbhs->UEP_CTRL[0].RX_CTRL.reg = RB_UEP_RES_NAK | tog;
+                rt_usbd_ep0_out_handler(&udc_device, usbhs->RX_LEN);
+            }
+            else
+            {
+                /* Corrupted ACK Handshake => ignore data, keep sequence bit */
+                usbhs->UEP_CTRL[0].RX_CTRL.res_mask = UEP_RES_NAK;
+            }
+        }
+    }
+    else if (token == DEV_TOKEN_IN)
+    {
+        /* wait for udc_ep_write to RES_ACK */
+        usbhs->UEP_CTRL[ep_idx].TX_CTRL.res_mask = UEP_RES_NAK;
+        size = usbhs->UEP_CTRL[ep_idx].t_len;
+        rt_usbd_ep_in_handler(&udc_device, ep_idx | USB_DIR_IN, size);
+    }
+    else if (token == DEV_TOKEN_OUT)
+    {
+        /* wait for udc_ep_read_prepare to RES_ACK */
+        usbhs->UEP_CTRL[ep_idx].RX_CTRL.res_mask = UEP_RES_NAK;
+        /* ignore data if Corrupted ACK Handshake */
+        if (usbhs->INT_ST.st_togok)
+        {
+            /* size:0 to trigger dcd_ep_read() in _data_notify() */
+            rt_usbd_ep_out_handler(&udc_device, ep_idx | USB_DIR_OUT, 0);
+        }
+    }
+}
+
+/*
+ * CAVEAT: The usbd design of ch56x relies on instant isr to RES_NAK
+ * UEP_CTRL[n].TX_CTRL/RX_CTRL. A long tarried isr may leave RES_ACK
+ * in UEP_CTRL[n] and starts unintended DMA upon arrival of IN/OUT.
+ */
+void usbhs_irq_handler(void) __attribute__((interrupt()));
+void usbhs_irq_handler(void)
+{
+    volatile struct usbhs_registers *usbhs;
+    union _usb_int_fg intflag;
+
+    isr_sp_enter();
+    rt_interrupt_enter();
+
+    usbhs = (struct usbhs_registers *)USBHS_REG_BASE;
+    intflag.reg = usbhs->INT_FG.reg;
+
+    if (intflag.fifoov)
+    {
+        /* FIXME: fifo overflow */
+        _isr_ep_stall(usbhs);
+    }
+    else
+    {
+        if (intflag.transfer)
+            _isr_handle_transfer(usbhs);
+
+        if (intflag.setupact)
+            _isr_handle_setup(usbhs);
+    }
+
+    if (intflag.busrst)
+    {
+        _hsbhs_device_mode_init(usbhs);
+        rt_usbd_reset_handler(&udc_device);
+    }
+
+    /* clear all pending intflag (suspend, isoact & nak ignored) */
+    usbhs->INT_FG.reg = intflag.reg;
+
+    rt_interrupt_leave();
+    isr_sp_leave();
+}

bsp/wch/risc-v/Libraries/ch56x_drivers/soc.h

@@ -21,6 +21,10 @@
 #define SOC_SERIES_CH569
 #endif
 
+#ifndef __packed
+#define __packed    __attribute__((packed))
+#endif
+
 #define CHECK_STRUCT_SIZE(s, size) \
         static_assert(sizeof(s) == size, #s " has wrong size")
 
@@ -29,10 +33,10 @@
 
 #define FLASH_BASE_ADDRESS  0x00000000
 #define RAMS_BASE_ADDRESS   0x20000000
-#define RAMX_BASE_ADDRESS   0x20020000
 #define BUS8_BASE_ADDRESS   0x80000000
 
 #ifdef SOC_SERIES_CH569
+#define RAMX_BASE_ADDRESS   0x20020000
 #define RAMS_SIZE           16
 #else
 #define RAMS_SIZE           32

bsp/wch/risc-v/ch569w-evt/.config

@@ -38,9 +38,9 @@ CONFIG_RT_KSERVICE_USING_STDLIB=y
 #
 CONFIG_RT_USING_SEMAPHORE=y
 CONFIG_RT_USING_MUTEX=y
-# CONFIG_RT_USING_EVENT is not set
+CONFIG_RT_USING_EVENT=y
 CONFIG_RT_USING_MAILBOX=y
-# CONFIG_RT_USING_MESSAGEQUEUE is not set
+CONFIG_RT_USING_MESSAGEQUEUE=y
 # CONFIG_RT_USING_SIGNALS is not set
 
 #
@@ -78,7 +78,7 @@ CONFIG_ARCH_RISCV=y
 #
 CONFIG_RT_USING_COMPONENTS_INIT=y
 CONFIG_RT_USING_USER_MAIN=y
-CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=1024
 CONFIG_RT_MAIN_THREAD_PRIORITY=10
 # CONFIG_RT_USING_LEGACY is not set
 CONFIG_RT_USING_MSH=y

bsp/wch/risc-v/ch569w-evt/applications/SConscript

@@ -2,9 +2,11 @@ from building import *
 
 cwd = GetCurrentDir()
 
+app = ARGUMENTS.get('app', "main")
+
 src = Split("""
-main.c
-""")
+{}.c
+""".format(app))
 
 path = [cwd, str(Dir('#'))]
 

bsp/wch/risc-v/ch569w-evt/applications/test.c

@@ -361,6 +361,52 @@ static void test_pwm(void)
     #define test_pwm()  do {} while(0)
 #endif
 
+#ifdef RT_USING_USB_DEVICE
+#if !defined(RT_USING_EVENT) || !defined(RT_USING_MESSAGEQUEUE)
+    #error "event flag or message queue IPC not enabled"
+#endif
+static struct rt_thread  *udvcom_thread;
+static rt_device_t vcom;
+
+static void usbd_vcom_thread(void *param)
+{
+    char ch;
+
+    while (1)
+    {
+        while (rt_device_read(vcom, 0, &ch, 1) != 1)
+            rt_thread_delay(1);
+        rt_kprintf("(%2d) %02x:%c\n", rt_device_write(vcom, 0, &ch, 1), ch, ch);
+        rt_pin_write(LED1_PIN, (ch & 1) ? PIN_LOW : PIN_HIGH);
+    }
+}
+
+static void test_usbd()
+{
+    char name[] = "vcom";
+
+    vcom = rt_device_find(name);
+    if (vcom && rt_device_open(vcom, RT_DEVICE_FLAG_INT_RX) == RT_EOK)
+    {
+        rt_kprintf("%s opened\n", name);
+
+        rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
+        rt_pin_write(LED1_PIN, PIN_LOW);
+
+        udvcom_thread = rt_thread_create("udvcom", usbd_vcom_thread, vcom,
+                                         512, 20, 50);
+        if (udvcom_thread != RT_NULL)
+            rt_thread_startup(udvcom_thread);
+        else
+            rt_kprintf("usvcom thread create failed !\n");
+
+        rt_device_write(vcom, 0, name, rt_strlen(name));
+    }
+}
+#else
+    #define test_usbd()  do {} while(0)
+#endif
+
 void main(void)
 {
     uint32_t wdog_timeout = 32;
@@ -372,6 +418,7 @@ void main(void)
     test_hwtimer();
     test_spi_master();
     test_pwm();
+    test_usbd();
 
     rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
     rt_pin_write(LED0_PIN, led0 = PIN_LOW);

bsp/wch/risc-v/ch569w-evt/board/linker_scripts/link.lds

 ENTRY( _start )
 
-__stack_size = 2048;
+__stack_size = 1536;
 
 PROVIDE( _stack_size = __stack_size );
 
 MEMORY
 {
-	FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 96K
-	RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
-	RAMX (xrw) : ORIGIN = 0x20020000, LENGTH = 32K
+    FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 96K
+    RAM (xrw)  : ORIGIN = 0x20000000, LENGTH = 16K
+    RAMX (xrw) : ORIGIN = 0x20020000, LENGTH = 32K
 }
 
 SECTIONS
 {
 
-	.init :
-	{
-		_sinit = .;
-		. = ALIGN(4);
-		KEEP(*(SORT_NONE(.init)))
-		. = ALIGN(4);
-		_einit = .;
-	} >FLASH AT>FLASH
+    .init :
+    {
+        _sinit = .;
+        . = ALIGN(4);
+        KEEP(*(SORT_NONE(.init)))
+        . = ALIGN(4);
+        _einit = .;
+    } >FLASH AT>FLASH
 
     .vector :
     {
         *(.vector);
-  	    . = ALIGN(64);
+        . = ALIGN(64);
+    } >FLASH AT>FLASH
+
+    .text :
+    {
+        . = ALIGN(4);
+        *(.text)
+        *(.text.*)
+        *(.rodata)
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t.*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        /* section information for modules */
+        . = ALIGN(4);
+        __rtmsymtab_start = .;
+        KEEP(*(RTMSymTab))
+        __rtmsymtab_end = .;
+        . = ALIGN(4);
+
+    } >FLASH AT>FLASH
+
+    .fini :
+    {
+        KEEP(*(SORT_NONE(.fini)))
+        . = ALIGN(4);
     } >FLASH AT>FLASH
 
-	.text :
-	{
-		. = ALIGN(4);
-		*(.text)
-		*(.text.*)
-		*(.rodata)
-		*(.rodata*)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.gnu.linkonce.t.*)
-
-		/* section information for finsh shell */
-    	. = ALIGN(4);
-    	__fsymtab_start = .;
-    	KEEP(*(FSymTab))
-    	__fsymtab_end = .;
-    	. = ALIGN(4);
-    	__vsymtab_start = .;
-    	KEEP(*(VSymTab))
-    	__vsymtab_end = .;
-    	. = ALIGN(4);
-
-    	/* section information for initial. */
-    	. = ALIGN(4);
-    	__rt_init_start = .;
-    	KEEP(*(SORT(.rti_fn*)))
-    	__rt_init_end = .;
-    	. = ALIGN(4);
-
-    	/* section information for modules */
-    	. = ALIGN(4);
-    	__rtmsymtab_start = .;
-    	KEEP(*(RTMSymTab))
-    	__rtmsymtab_end = .;
-		. = ALIGN(4);
-
-	} >FLASH AT>FLASH 
-
-	.fini :
-	{
-		KEEP(*(SORT_NONE(.fini)))
-		. = ALIGN(4);
-	} >FLASH AT>FLASH
-
-	PROVIDE( _etext = . );
-	PROVIDE( _eitcm = . );	
-
-	.preinit_array :
-	{
-	  	PROVIDE_HIDDEN (__preinit_array_start = .);
-	  	KEEP (*(.preinit_array))
-	  	PROVIDE_HIDDEN (__preinit_array_end = .);
-	} >FLASH AT>FLASH 
-	
-	.init_array :
-	{
-	  	PROVIDE_HIDDEN (__init_array_start = .);
-	  	KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
-	  	KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
-	  	PROVIDE_HIDDEN (__init_array_end = .);
-	} >FLASH AT>FLASH 
-	
-	.fini_array :
-	{
-	  	PROVIDE_HIDDEN (__fini_array_start = .);
-	  	KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
-	  	KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
-	  	PROVIDE_HIDDEN (__fini_array_end = .);
-	} >FLASH AT>FLASH 
-	
-	.ctors :
-	{
-	  	/* gcc uses crtbegin.o to find the start of
-	  	   the constructors, so we make sure it is
-	  	   first.  Because this is a wildcard, it
-	  	   doesn't matter if the user does not
-	  	   actually link against crtbegin.o; the
-	  	   linker won't look for a file to match a
-	  	   wildcard.  The wildcard also means that it
-	  	   doesn't matter which directory crtbegin.o
-	  	   is in.  */
-	  	KEEP (*crtbegin.o(.ctors))
-	  	KEEP (*crtbegin?.o(.ctors))
-	  	/* We don't want to include the .ctor section from
-	  	   the crtend.o file until after the sorted ctors.
-	  	   The .ctor section from the crtend file contains the
-	  	   end of ctors marker and it must be last */
-	  	KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
-	  	KEEP (*(SORT(.ctors.*)))
-	  	KEEP (*(.ctors))
-	} >FLASH AT>FLASH 
-	
-	.dtors :
-	{
-	  	KEEP (*crtbegin.o(.dtors))
-	  	KEEP (*crtbegin?.o(.dtors))
-	  	KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
-	  	KEEP (*(SORT(.dtors.*)))
-	  	KEEP (*(.dtors))
-	} >FLASH AT>FLASH 
-
-	.dalign :
-	{
-		. = ALIGN(4);
-		PROVIDE(_data_vma = .);
-	} >RAM AT>FLASH	
-
-	.dlalign :
-	{
-		. = ALIGN(4); 
-		PROVIDE(_data_lma = .);
-	} >FLASH AT>FLASH
-
-	.data :
-	{
-    	*(.gnu.linkonce.r.*)
-    	*(.data .data.*)
-    	*(.gnu.linkonce.d.*)
-		. = ALIGN(8);
-    	PROVIDE( __global_pointer$ = . + 0x800 );
-    	*(.sdata .sdata.*)
-		*(.sdata2.*)
-    	*(.gnu.linkonce.s.*)
-    	. = ALIGN(8);
-    	*(.srodata.cst16)
-    	*(.srodata.cst8)
-    	*(.srodata.cst4)
-    	*(.srodata.cst2)
-    	*(.srodata .srodata.*)
-    	. = ALIGN(4);
-		PROVIDE( _edata = .);
-	} >RAM AT>FLASH
-
-	.bss :
-	{
-		. = ALIGN(4);
-		PROVIDE( _sbss = .);
-  	    *(.sbss*)
+    PROVIDE( _etext = . );
+    PROVIDE( _eitcm = . );
+
+    .preinit_array :
+    {
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP (*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+    } >FLASH AT>FLASH
+
+    .init_array :
+    {
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+        KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+        PROVIDE_HIDDEN (__init_array_end = .);
+    } >FLASH AT>FLASH
+
+    .fini_array :
+    {
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+        KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+    } >FLASH AT>FLASH
+
+    .ctors :
+    {
+        /* gcc uses crtbegin.o to find the start of
+           the constructors, so we make sure it is
+           first.  Because this is a wildcard, it
+           doesn't matter if the user does not
+           actually link against crtbegin.o; the
+           linker won't look for a file to match a
+           wildcard.  The wildcard also means that it
+           doesn't matter which directory crtbegin.o
+           is in.  */
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*crtbegin?.o(.ctors))
+        /* We don't want to include the .ctor section from
+           the crtend.o file until after the sorted ctors.
+           The .ctor section from the crtend file contains the
+           end of ctors marker and it must be last */
+        KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*(.ctors))
+    } >FLASH AT>FLASH
+
+    .dtors :
+    {
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*crtbegin?.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*(.dtors))
+    } >FLASH AT>FLASH
+
+    .dalign :
+    {
+        . = ALIGN(4);
+        PROVIDE(_data_vma = .);
+    } >RAM AT>FLASH
+
+    .dlalign :
+    {
+        . = ALIGN(4);
+        PROVIDE(_data_lma = .);
+    } >FLASH AT>FLASH
+
+    .data :
+    {
+        *(.gnu.linkonce.r.*)
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        . = ALIGN(8);
+        PROVIDE( __global_pointer$ = . + 0x800 );
+        *(.sdata .sdata.*)
+        *(.sdata2.*)
+        *(.gnu.linkonce.s.*)
+        . = ALIGN(8);
+        *(.srodata.cst16)
+        *(.srodata.cst8)
+        *(.srodata.cst4)
+        *(.srodata.cst2)
+        *(.srodata .srodata.*)
+        . = ALIGN(4);
+        PROVIDE( _edata = .);
+    } >RAM AT>FLASH
+
+    .bss :
+    {
+        . = ALIGN(4);
+        PROVIDE( _sbss = .);
+        *(.sbss*)
         *(.gnu.linkonce.sb.*)
-		*(.bss*)
-     	*(.gnu.linkonce.b.*)		
-		*(COMMON*)
-		. = ALIGN(4);
-		PROVIDE( _ebss = .);
-	} >RAM AT>FLASH
-
-	PROVIDE( _end = _ebss);
-	PROVIDE( end = . );
-	
-	.dmadata :
+        *(.bss*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON*)
+        . = ALIGN(4);
+        PROVIDE( _ebss = .);
+    } >RAM AT>FLASH
+
+    PROVIDE( _end = _ebss);
+    PROVIDE( end = . );
+
+    .dmadata :
     {
-        . = ALIGN(16);
         PROVIDE( _dmadata_start = .);
+        /* first 8 bytes are reserved for USB ep0 SETUP */
+        . = . + 8;
+        . = ALIGN(16);
         *(.dmadata*)
         *(.dmadata.*)
         . = ALIGN(16);
@@ -195,5 +197,5 @@ SECTIONS
         PROVIDE(_susrstack = . );
         . = . + __stack_size;
         PROVIDE( _eusrstack = .);
-    } >RAM 
+    } >RAM
 }

bsp/wch/risc-v/ch569w-evt/rtconfig.h

@@ -25,7 +25,9 @@
 
 #define RT_USING_SEMAPHORE
 #define RT_USING_MUTEX
+#define RT_USING_EVENT
 #define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
 
 /* Memory Management */
 
@@ -48,7 +50,7 @@
 
 #define RT_USING_COMPONENTS_INIT
 #define RT_USING_USER_MAIN
-#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_STACK_SIZE 1024
 #define RT_MAIN_THREAD_PRIORITY 10
 #define RT_USING_MSH
 #define RT_USING_FINSH