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提交 8238f850 编写于 作者: B Bernard Xiong
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Merge pull request #98 from grissiom/rm48x50 

Rm48x50
上级 ac032ad0 e74befca
展开全部 隐藏空白更改
内联 并排
Showing with 49957 addition and 94 deletion
bsp/rm48x50/HALCoGen/HALCoGen.dil 0 → 100644
浏览文件 @ 8238f850
此差异已折叠。
bsp/rm48x50/HALCoGen/HALCoGen.hcg 0 → 100644
浏览文件 @ 8238f850
<?xml version="1.0" encoding="UTF-8"?>
<SETTINGS>
<DEVICE>
<family>RM48x</family>
<device>RM48L950ZWT</device>
<dilfile>HALCoGen.dil</dilfile>
<tools>ti</tools>
</DEVICE>
<VERSION>
<version>03.05.02</version>
</VERSION>
<HET1>
<FILENAME>
<HET1ASMHDR>
<NAME/>
</HET1ASMHDR>
<HET1ASMSRC>
<NAME/>
</HET1ASMSRC>
</FILENAME>
</HET1>
<HET2>
<FILENAME>
<HET2ASMHDR>
<NAME/>
</HET2ASMHDR>
<HET2ASMSRC>
<NAME/>
</HET2ASMSRC>
</FILENAME>
</HET2>
<SYSTEM>
<FILENAMES>
<HDRHAL>
<NAME>hal_stdtypes.h</NAME>
<PATH>include\hal_stdtypes.h</PATH>
</HDRHAL>
<HDRCOMMON>
<NAME>sys_common.h</NAME>
<PATH>include\sys_common.h</PATH>
</HDRCOMMON>
<HDRSYSTEM_R>
<NAME>reg_system.h</NAME>
<PATH>include\reg_system.h</PATH>
</HDRSYSTEM_R>
<HDRFLASH_R>
<NAME>reg_flash.h</NAME>
<PATH>include\reg_flash.h</PATH>
</HDRFLASH_R>
<HDRTCRAM_R>
<NAME>reg_tcram.h</NAME>
<PATH>include\reg_tcram.h</PATH>
</HDRTCRAM_R>
<HDRVIM_R>
<NAME>reg_vim.h</NAME>
<PATH>include\reg_vim.h</PATH>
</HDRVIM_R>
<HDRPBIST_R>
<NAME>reg_pbist.h</NAME>
<PATH>include\reg_pbist.h</PATH>
</HDRPBIST_R>
<HDRSTC_R>
<NAME>reg_stc.h</NAME>
<PATH>include\reg_stc.h</PATH>
</HDRSTC_R>
<HDREFC_R>
<NAME>reg_efc.h</NAME>
<PATH>include\reg_efc.h</PATH>
</HDREFC_R>
<HDRPCR_R>
<NAME>reg_pcr.h</NAME>
<PATH>include\reg_pcr.h</PATH>
</HDRPCR_R>
<HDRPMM_R>
<NAME>reg_pmm.h</NAME>
<PATH>include\reg_pmm.h</PATH>
</HDRPMM_R>
<HDRDMA_R>
<NAME>reg_dma.h</NAME>
<PATH>include\reg_dma.h</PATH>
</HDRDMA_R>
<HDRSYSTEM>
<NAME>system.h</NAME>
<PATH>include\system.h</PATH>
</HDRSYSTEM>
<HDRVIM>
<NAME>sys_vim.h</NAME>
<PATH>include\sys_vim.h</PATH>
</HDRVIM>
<HDRCORE>
<NAME>sys_core.h</NAME>
<PATH>include\sys_core.h</PATH>
</HDRCORE>
<HDRMPU>
<NAME>sys_mpu.h</NAME>
<PATH>include\sys_mpu.h</PATH>
</HDRMPU>
<HDRPMU>
<NAME>sys_pmu.h</NAME>
<PATH>include\sys_pmu.h</PATH>
</HDRPMU>
<HDRPCR>
<NAME>sys_pcr.h</NAME>
<PATH>include\sys_pcr.h</PATH>
</HDRPCR>
<HDRPMM>
<NAME>sys_pmm.h</NAME>
<PATH>include\sys_pmm.h</PATH>
</HDRPMM>
<HDRDMA>
<NAME>sys_dma.h</NAME>
<PATH>include\sys_dma.h</PATH>
</HDRDMA>
<HDRSLF>
<NAME>sys_selftest.h</NAME>
<PATH>include\sys_selftest.h</PATH>
</HDRSLF>
<SRCCORE>
<NAME>sys_core.asm</NAME>
<PATH>source\sys_core.asm</PATH>
</SRCCORE>
<SRCINTVECS>
<NAME>sys_intvecs.asm</NAME>
<PATH>source\sys_intvecs.asm</PATH>
</SRCINTVECS>
<SRCMPU>
<NAME>sys_mpu.asm</NAME>
<PATH>source\sys_mpu.asm</PATH>
</SRCMPU>
<SRCPMU>
<NAME>sys_pmu.asm</NAME>
<PATH>source\sys_pmu.asm</PATH>
</SRCPMU>
<SRCDABORT>
<NAME>dabort.asm</NAME>
<PATH>source\dabort.asm</PATH>
</SRCDABORT>
<SRCPCR>
<NAME>sys_pcr.c</NAME>
<PATH>source\sys_pcr.c</PATH>
</SRCPCR>
<SRCPMM>
<NAME>sys_pmm.c</NAME>
<PATH>source\sys_pmm.c</PATH>
</SRCPMM>
<SRCDMA>
<NAME>sys_dma.c</NAME>
<PATH>source\sys_dma.c</PATH>
</SRCDMA>
<SRCSYSTEM>
<NAME>system.c</NAME>
<PATH>source\system.c</PATH>
</SRCSYSTEM>
<SRCPHANTOM>
<NAME>sys_phantom.c</NAME>
<PATH>source\sys_phantom.c</PATH>
</SRCPHANTOM>
<SRCSTARTUP>
<NAME>sys_startup.c</NAME>
<PATH>source\sys_startup.c</PATH>
</SRCSTARTUP>
<SRCSLF>
<NAME>sys_selftest.c</NAME>
<PATH>source\sys_selftest.c</PATH>
</SRCSLF>
<SRCVIM>
<NAME>sys_vim.c</NAME>
<PATH>source\sys_vim.c</PATH>
</SRCVIM>
<SRCMAIN>
<NAME>sys_main.c</NAME>
<PATH>source\sys_main.c</PATH>
</SRCMAIN>
<SRCNOTIFY>
<NAME>notification.c</NAME>
<PATH>source\notification.c</PATH>
</SRCNOTIFY>
<SRCCMD>
<NAME>sys_link.cmd</NAME>
<PATH>source\sys_link.cmd</PATH>
</SRCCMD>
<SRCMISRA-C>
<NAME>misra-c.txt</NAME>
<PATH>misra-c.txt</PATH>
</SRCMISRA-C>
<HDRMUX_R>
<NAME>reg_pinmux.h</NAME>
</HDRMUX_R>
<HDRMUX>
<NAME>pinmux.h</NAME>
</HDRMUX>
<SRCMUX>
<NAME>pinmux.c</NAME>
</SRCMUX>
<HDRRTI_R>
<NAME>reg_rti.h</NAME>
</HDRRTI_R>
<HDRRTI>
<NAME>rti.h</NAME>
</HDRRTI>
<SRCRTI>
<NAME>rti.c</NAME>
</SRCRTI>
<HDRGIO_R>
<NAME>reg_gio.h</NAME>
</HDRGIO_R>
<HDRGIO>
<NAME>gio.h</NAME>
</HDRGIO>
<SRCGIO>
<NAME>gio.c</NAME>
</SRCGIO>
<HDRSCI_R>
<NAME>reg_sci.h</NAME>
</HDRSCI_R>
<HDRSCI>
<NAME>sci.h</NAME>
</HDRSCI>
<SRCSCI>
<NAME>sci.c</NAME>
</SRCSCI>
<HDRLIN_R>
<NAME>reg_lin.h</NAME>
</HDRLIN_R>
<HDRLIN>
<NAME>lin.h</NAME>
</HDRLIN>
<SRCLIN/>
<HDRMIBSPI_R>
<NAME>reg_mibspi.h</NAME>
</HDRMIBSPI_R>
<HDRMIBSPI>
<NAME>mibspi.h</NAME>
</HDRMIBSPI>
<SRCMIBSPI/>
<HDRSPI_R>
<NAME>reg_spi.h</NAME>
</HDRSPI_R>
<HDRSPI>
<NAME>spi.h</NAME>
</HDRSPI>
<SRCSPI/>
<HDRCAN_R>
<NAME>reg_can.h</NAME>
</HDRCAN_R>
<HDRCAN>
<NAME>can.h</NAME>
</HDRCAN>
<SRCCAN/>
<HDRADC_R>
<NAME>reg_adc.h</NAME>
</HDRADC_R>
<HDRADC>
<NAME>adc.h</NAME>
</HDRADC>
<SRCADC/>
<HET1ASMHDR>
<NAME/>
</HET1ASMHDR>
<HET1ASMSRC>
<NAME/>
</HET1ASMSRC>
<STDHDRHET>
<NAME>std_nhet.h</NAME>
</STDHDRHET>
<HDRHET_R>
<NAME>reg_het.h</NAME>
</HDRHET_R>
<HDRHET>
<NAME>het.h</NAME>
</HDRHET>
<HDRHTU_R>
<NAME>reg_htu.h</NAME>
</HDRHTU_R>
<HDRHTU>
<NAME>htu.h</NAME>
</HDRHTU>
<SRCHET/>
<HET2ASMHDR>
<NAME/>
</HET2ASMHDR>
<HET2ASMSRC>
<NAME/>
</HET2ASMSRC>
<HDRESM_R>
<NAME>reg_esm.h</NAME>
</HDRESM_R>
<HDRESM>
<NAME>esm.h</NAME>
</HDRESM>
<SRCESM>
<NAME>esm.c</NAME>
</SRCESM>
<HDRI2C_R>
<NAME>reg_i2c.h</NAME>
</HDRI2C_R>
<HDRI2C>
<NAME>i2c.h</NAME>
</HDRI2C>
<SRCI2C/>
<HDR1EMAC>
<NAME>emac.h</NAME>
</HDR1EMAC>
<HDR2EMAC>
<NAME>hw_emac.h</NAME>
</HDR2EMAC>
<HDR3EMAC>
<NAME>hw_emac_ctrl.h</NAME>
</HDR3EMAC>
<HDR4EMAC>
<NAME>hw_mdio.h</NAME>
</HDR4EMAC>
<HDR5EMAC>
<NAME>hw_reg_access.h</NAME>
</HDR5EMAC>
<HDR6EMAC>
<NAME>mdio.h</NAME>
</HDR6EMAC>
<SRC1EMAC/>
<SRC2EMAC/>
<HDRDCC_R>
<NAME>reg_dcc.h</NAME>
</HDRDCC_R>
<HDRDCC>
<NAME>dcc.h</NAME>
</HDRDCC>
<SRCDCC/>
<HDRRTP_R>
<NAME>reg_rtp.h</NAME>
</HDRRTP_R>
<HDRRTP>
<NAME>rtp.h</NAME>
</HDRRTP>
<SRCRTP/>
<HDRDMM_R>
<NAME>reg_dmm.h</NAME>
</HDRDMM_R>
<HDRDMM>
<NAME>dmm.h</NAME>
</HDRDMM>
<SRCDMM/>
<HDREMIF_R>
<NAME>reg_emif.h</NAME>
</HDREMIF_R>
<HDREMIF>
<NAME>emif.h</NAME>
</HDREMIF>
<SRCEMIF/>
<HDRPOM_R>
<NAME>reg_pom.h</NAME>
</HDRPOM_R>
<HDRPOM>
<NAME>pom.h</NAME>
</HDRPOM>
<SRCPOM/>
<HDR1USB>
<NAME>usbcdc.h</NAME>
</HDR1USB>
<HDR2USB>
<NAME>usb_serial_structs.h</NAME>
</HDR2USB>
<HDR3USB>
<NAME>usbdcdc.h</NAME>
</HDR3USB>
<HDR4USB>
<NAME>usbdevice.h</NAME>
</HDR4USB>
<HDR5USB>
<NAME>usbdevicepriv.h</NAME>
</HDR5USB>
<HDR6USB>
<NAME>usb-ids.h</NAME>
</HDR6USB>
<HDR7USB>
<NAME>usblib.h</NAME>
</HDR7USB>
<HDR8USB>
<NAME>usb.h</NAME>
</HDR8USB>
<HDR9USB>
<NAME>hw_usb.h</NAME>
</HDR9USB>
<SRC1USB/>
<SRC2USB/>
<SRC3USB/>
<SRC5USB/>
<SRC6USB/>
<SRC7USB/>
<SRC8USB/>
<SRC9USB/>
<SRC10USB/>
<HDRCRC_R>
<NAME>reg_crc.h</NAME>
</HDRCRC_R>
<HDRCRC>
<NAME>crc.h</NAME>
</HDRCRC>
<SRCCRC/>
</FILENAMES>
</SYSTEM>
<PINMUX>
<FILENAMES>
<HDRMUX_R>
<PATH>include\reg_pinmux.h</PATH>
</HDRMUX_R>
<HDRMUX>
<PATH>include\pinmux.h</PATH>
</HDRMUX>
<SRCMUX>
<PATH>source\pinmux.c</PATH>
</SRCMUX>
</FILENAMES>
</PINMUX>
<RTI>
<FILENAMES>
<HDRRTI_R>
<PATH>include\reg_rti.h</PATH>
</HDRRTI_R>
<HDRRTI>
<PATH>include\rti.h</PATH>
</HDRRTI>
<SRCRTI>
<PATH>source\rti.c</PATH>
</SRCRTI>
</FILENAMES>
</RTI>
<GIO>
<FILENAMES>
<HDRGIO_R>
<PATH>include\reg_gio.h</PATH>
</HDRGIO_R>
<HDRGIO>
<PATH>include\gio.h</PATH>
</HDRGIO>
<SRCGIO>
<PATH>source\gio.c</PATH>
</SRCGIO>
</FILENAMES>
</GIO>
<SCI>
<FILENAMES>
<HDRSCI_R>
<PATH>include\reg_sci.h</PATH>
</HDRSCI_R>
<HDRSCI>
<PATH>include\sci.h</PATH>
</HDRSCI>
<SRCSCI>
<PATH>source\sci.c</PATH>
</SRCSCI>
</FILENAMES>
</SCI>
<LIN>
<FILENAMES>
<HDRLIN_R>
<PATH>include\reg_lin.h</PATH>
</HDRLIN_R>
<HDRLIN>
<PATH>include\lin.h</PATH>
</HDRLIN>
<SRCLIN>
<PATH/>
</SRCLIN>
</FILENAMES>
</LIN>
<MIBSPI>
<FILENAMES>
<HDRMIBSPI_R>
<PATH>include\reg_mibspi.h</PATH>
</HDRMIBSPI_R>
<HDRMIBSPI>
<PATH>include\mibspi.h</PATH>
</HDRMIBSPI>
<SRCMIBSPI>
<PATH/>
</SRCMIBSPI>
</FILENAMES>
</MIBSPI>
<SPI>
<FILENAMES>
<HDRSPI_R>
<PATH>include\reg_spi.h</PATH>
</HDRSPI_R>
<HDRSPI>
<PATH>include\spi.h</PATH>
</HDRSPI>
<SRCSPI>
<PATH/>
</SRCSPI>
</FILENAMES>
</SPI>
<CAN>
<FILENAMES>
<HDRCAN_R>
<PATH>include\reg_can.h</PATH>
</HDRCAN_R>
<HDRCAN>
<PATH>include\can.h</PATH>
</HDRCAN>
<SRCCAN>
<PATH/>
</SRCCAN>
</FILENAMES>
</CAN>
<ADC>
<FILENAMES>
<HDRADC_R>
<PATH>include\reg_adc.h</PATH>
</HDRADC_R>
<HDRADC>
<PATH>include\adc.h</PATH>
</HDRADC>
<SRCADC>
<PATH/>
</SRCADC>
</FILENAMES>
</ADC>
<HET>
<FILENAMES>
<STDHDRHET>
<PATH>include\std_nhet.h</PATH>
</STDHDRHET>
<HDRHET_R>
<PATH>include\reg_het.h</PATH>
</HDRHET_R>
<HDRHET>
<PATH>include\het.h</PATH>
</HDRHET>
<HDRHTU_R>
<PATH>include\reg_htu.h</PATH>
</HDRHTU_R>
<HDRHTU>
<PATH>include\htu.h</PATH>
</HDRHTU>
<SRCHET>
<PATH/>
</SRCHET>
</FILENAMES>
</HET>
<ESM>
<FILENAMES>
<HDRESM_R>
<PATH>include\reg_esm.h</PATH>
</HDRESM_R>
<HDRESM>
<PATH>include\esm.h</PATH>
</HDRESM>
<SRCESM>
<PATH>source\esm.c</PATH>
</SRCESM>
</FILENAMES>
</ESM>
<I2C>
<FILENAMES>
<HDRI2C_R>
<PATH>include\reg_i2c.h</PATH>
</HDRI2C_R>
<HDRI2C>
<PATH>include\i2c.h</PATH>
</HDRI2C>
<SRCI2C>
<PATH/>
</SRCI2C>
</FILENAMES>
</I2C>
<EMAC>
<FILENAMES>
<HDR1EMAC>
<PATH>include\emac.h</PATH>
</HDR1EMAC>
<HDR2EMAC>
<PATH>include\hw_emac.h</PATH>
</HDR2EMAC>
<HDR3EMAC>
<PATH>include\hw_emac_ctrl.h</PATH>
</HDR3EMAC>
<HDR4EMAC>
<PATH>include\hw_mdio.h</PATH>
</HDR4EMAC>
<HDR5EMAC>
<PATH>include\hw_reg_access.h</PATH>
</HDR5EMAC>
<HDR6EMAC>
<PATH>include\mdio.h</PATH>
</HDR6EMAC>
<SRC1EMAC>
<PATH/>
</SRC1EMAC>
<SRC2EMAC>
<PATH/>
</SRC2EMAC>
</FILENAMES>
</EMAC>
<DCC>
<FILENAMES>
<HDRDCC_R>
<PATH>include\reg_dcc.h</PATH>
</HDRDCC_R>
<HDRDCC>
<PATH>include\dcc.h</PATH>
</HDRDCC>
<SRCDCC>
<PATH/>
</SRCDCC>
</FILENAMES>
</DCC>
<RTP>
<FILENAMES>
<HDRRTP_R>
<PATH>include\reg_rtp.h</PATH>
</HDRRTP_R>
<HDRRTP>
<PATH>include\rtp.h</PATH>
</HDRRTP>
<SRCRTP>
<PATH/>
</SRCRTP>
</FILENAMES>
</RTP>
<DMM>
<FILENAMES>
<HDRDMM_R>
<PATH>include\reg_dmm.h</PATH>
</HDRDMM_R>
<HDRDMM>
<PATH>include\dmm.h</PATH>
</HDRDMM>
<SRCDMM>
<PATH/>
</SRCDMM>
</FILENAMES>
</DMM>
<EMIF>
<FILENAMES>
<HDREMIF_R>
<PATH>include\reg_emif.h</PATH>
</HDREMIF_R>
<HDREMIF>
<PATH>include\emif.h</PATH>
</HDREMIF>
<SRCEMIF>
<PATH/>
</SRCEMIF>
</FILENAMES>
</EMIF>
<POM>
<FILENAMES>
<HDRPOM_R>
<PATH>include\reg_pom.h</PATH>
</HDRPOM_R>
<HDRPOM>
<PATH>include\pom.h</PATH>
</HDRPOM>
<SRCPOM>
<PATH/>
</SRCPOM>
</FILENAMES>
</POM>
<USB>
<FILENAMES>
<HDR1USB>
<PATH>include\usbcdc.h</PATH>
</HDR1USB>
<HDR2USB>
<PATH>include\usb_serial_structs.h</PATH>
</HDR2USB>
<HDR3USB>
<PATH>include\usbdcdc.h</PATH>
</HDR3USB>
<HDR4USB>
<PATH>include\usbdevice.h</PATH>
</HDR4USB>
<HDR5USB>
<PATH>include\usbdevicepriv.h</PATH>
</HDR5USB>
<HDR6USB>
<PATH>include\usb-ids.h</PATH>
</HDR6USB>
<HDR7USB>
<PATH>include\usblib.h</PATH>
</HDR7USB>
<HDR8USB>
<PATH>include\usb.h</PATH>
</HDR8USB>
<HDR9USB>
<PATH>include\hw_usb.h</PATH>
</HDR9USB>
<SRC1USB>
<PATH/>
</SRC1USB>
<SRC2USB>
<PATH/>
</SRC2USB>
<SRC3USB>
<PATH/>
</SRC3USB>
<SRC5USB>
<PATH/>
</SRC5USB>
<SRC6USB>
<PATH/>
</SRC6USB>
<SRC7USB>
<PATH/>
</SRC7USB>
<SRC8USB>
<PATH/>
</SRC8USB>
<SRC9USB>
<PATH/>
</SRC9USB>
<SRC10USB>
<PATH/>
</SRC10USB>
</FILENAMES>
</USB>
<CRC>
<FILENAMES>
<HDRCRC_R>
<PATH>include\reg_crc.h</PATH>
</HDRCRC_R>
<HDRCRC>
<PATH>include\crc.h</PATH>
</HDRCRC>
<SRCCRC>
<PATH/>
</SRCCRC>
</FILENAMES>
</CRC>
</SETTINGS>
bsp/rm48x50/HALCoGen/HALCoGen_bak.dil 0 → 100644
浏览文件 @ 8238f850
此差异已折叠。
bsp/rm48x50/HALCoGen/HALCoGen_bak.hcg 0 → 100644
浏览文件 @ 8238f850
<?xml version="1.0" encoding="UTF-8"?>
<SETTINGS>
<DEVICE>
<family>RM48x</family>
<device>RM48L950ZWT</device>
<dilfile>HALCoGen.dil</dilfile>
<tools>ti</tools>
</DEVICE>
<VERSION>
<version>03.05.00</version>
</VERSION>
<HET1>
<FILENAME>
<HET1ASMHDR>
<NAME/>
</HET1ASMHDR>
<HET1ASMSRC>
<NAME/>
</HET1ASMSRC>
</FILENAME>
</HET1>
<HET2>
<FILENAME>
<HET2ASMHDR>
<NAME/>
</HET2ASMHDR>
<HET2ASMSRC>
<NAME/>
</HET2ASMSRC>
</FILENAME>
</HET2>
<SYSTEM>
<FILENAMES>
<HDRHAL>
<NAME>hal_stdtypes.h</NAME>
<PATH>include\hal_stdtypes.h</PATH>
</HDRHAL>
<HDRCOMMON>
<NAME>sys_common.h</NAME>
<PATH>include\sys_common.h</PATH>
</HDRCOMMON>
<HDRSYSTEM_R>
<NAME>reg_system.h</NAME>
<PATH>include\reg_system.h</PATH>
</HDRSYSTEM_R>
<HDRFLASH_R>
<NAME>reg_flash.h</NAME>
<PATH>include\reg_flash.h</PATH>
</HDRFLASH_R>
<HDRTCRAM_R>
<NAME>reg_tcram.h</NAME>
<PATH>include\reg_tcram.h</PATH>
</HDRTCRAM_R>
<HDRVIM_R>
<NAME>reg_vim.h</NAME>
<PATH>include\reg_vim.h</PATH>
</HDRVIM_R>
<HDRPBIST_R>
<NAME>reg_pbist.h</NAME>
<PATH>include\reg_pbist.h</PATH>
</HDRPBIST_R>
<HDRSTC_R>
<NAME>reg_stc.h</NAME>
<PATH>include\reg_stc.h</PATH>
</HDRSTC_R>
<HDREFC_R>
<NAME>reg_efc.h</NAME>
<PATH>include\reg_efc.h</PATH>
</HDREFC_R>
<HDRPCR_R>
<NAME>reg_pcr.h</NAME>
<PATH>include\reg_pcr.h</PATH>
</HDRPCR_R>
<HDRPMM_R>
<NAME>reg_pmm.h</NAME>
<PATH>include\reg_pmm.h</PATH>
</HDRPMM_R>
<HDRDMA_R>
<NAME>reg_dma.h</NAME>
<PATH>include\reg_dma.h</PATH>
</HDRDMA_R>
<HDRSYSTEM>
<NAME>system.h</NAME>
<PATH>include\system.h</PATH>
</HDRSYSTEM>
<HDRVIM>
<NAME>sys_vim.h</NAME>
<PATH>include\sys_vim.h</PATH>
</HDRVIM>
<HDRCORE>
<NAME>sys_core.h</NAME>
<PATH>include\sys_core.h</PATH>
</HDRCORE>
<HDRMPU>
<NAME>sys_mpu.h</NAME>
<PATH>include\sys_mpu.h</PATH>
</HDRMPU>
<HDRPMU>
<NAME>sys_pmu.h</NAME>
<PATH>include\sys_pmu.h</PATH>
</HDRPMU>
<HDRPCR>
<NAME>sys_pcr.h</NAME>
<PATH>include\sys_pcr.h</PATH>
</HDRPCR>
<HDRPMM>
<NAME>sys_pmm.h</NAME>
<PATH>include\sys_pmm.h</PATH>
</HDRPMM>
<HDRDMA>
<NAME>sys_dma.h</NAME>
<PATH>include\sys_dma.h</PATH>
</HDRDMA>
<HDRSLF>
<NAME>sys_selftest.h</NAME>
<PATH>include\sys_selftest.h</PATH>
</HDRSLF>
<SRCCORE>
<NAME>sys_core.asm</NAME>
<PATH>source\sys_core.asm</PATH>
</SRCCORE>
<SRCINTVECS>
<NAME>sys_intvecs.asm</NAME>
<PATH>source\sys_intvecs.asm</PATH>
</SRCINTVECS>
<SRCMPU>
<NAME>sys_mpu.asm</NAME>
<PATH>source\sys_mpu.asm</PATH>
</SRCMPU>
<SRCPMU>
<NAME>sys_pmu.asm</NAME>
<PATH>source\sys_pmu.asm</PATH>
</SRCPMU>
<SRCDABORT>
<NAME>dabort.asm</NAME>
<PATH>source\dabort.asm</PATH>
</SRCDABORT>
<SRCPCR>
<NAME>sys_pcr.c</NAME>
<PATH>source\sys_pcr.c</PATH>
</SRCPCR>
<SRCPMM>
<NAME>sys_pmm.c</NAME>
<PATH>source\sys_pmm.c</PATH>
</SRCPMM>
<SRCDMA>
<NAME>sys_dma.c</NAME>
<PATH>source\sys_dma.c</PATH>
</SRCDMA>
<SRCSYSTEM>
<NAME>system.c</NAME>
<PATH>source\system.c</PATH>
</SRCSYSTEM>
<SRCPHANTOM>
<NAME>sys_phantom.c</NAME>
<PATH>source\sys_phantom.c</PATH>
</SRCPHANTOM>
<SRCSTARTUP>
<NAME>sys_startup.c</NAME>
<PATH>source\sys_startup.c</PATH>
</SRCSTARTUP>
<SRCSLF>
<NAME>sys_selftest.c</NAME>
<PATH>source\sys_selftest.c</PATH>
</SRCSLF>
<SRCVIM>
<NAME>sys_vim.c</NAME>
<PATH>source\sys_vim.c</PATH>
</SRCVIM>
<SRCMAIN>
<NAME>sys_main.c</NAME>
<PATH>source\sys_main.c</PATH>
</SRCMAIN>
<SRCNOTIFY>
<NAME>notification.c</NAME>
<PATH>source\notification.c</PATH>
</SRCNOTIFY>
<SRCCMD>
<NAME>sys_link.cmd</NAME>
<PATH>source\sys_link.cmd</PATH>
</SRCCMD>
<SRCMISRA-C>
<NAME>misra-c.txt</NAME>
<PATH>misra-c.txt</PATH>
</SRCMISRA-C>
<HDRMUX_R>
<NAME>reg_pinmux.h</NAME>
</HDRMUX_R>
<HDRMUX>
<NAME>pinmux.h</NAME>
</HDRMUX>
<SRCMUX>
<NAME>pinmux.c</NAME>
</SRCMUX>
<HDRRTI_R>
<NAME>reg_rti.h</NAME>
</HDRRTI_R>
<HDRRTI>
<NAME>rti.h</NAME>
</HDRRTI>
<SRCRTI>
<NAME>rti.c</NAME>
</SRCRTI>
<HDRGIO_R>
<NAME>reg_gio.h</NAME>
</HDRGIO_R>
<HDRGIO>
<NAME>gio.h</NAME>
</HDRGIO>
<SRCGIO>
<NAME>gio.c</NAME>
</SRCGIO>
<HDRSCI_R>
<NAME>reg_sci.h</NAME>
</HDRSCI_R>
<HDRSCI>
<NAME>sci.h</NAME>
</HDRSCI>
<SRCSCI>
<NAME>sci.c</NAME>
</SRCSCI>
<HDRLIN_R>
<NAME>reg_lin.h</NAME>
</HDRLIN_R>
<HDRLIN>
<NAME>lin.h</NAME>
</HDRLIN>
<SRCLIN/>
<HDRMIBSPI_R>
<NAME>reg_mibspi.h</NAME>
</HDRMIBSPI_R>
<HDRMIBSPI>
<NAME>mibspi.h</NAME>
</HDRMIBSPI>
<SRCMIBSPI/>
<HDRSPI_R>
<NAME>reg_spi.h</NAME>
</HDRSPI_R>
<HDRSPI>
<NAME>spi.h</NAME>
</HDRSPI>
<SRCSPI/>
<HDRCAN_R>
<NAME>reg_can.h</NAME>
</HDRCAN_R>
<HDRCAN>
<NAME>can.h</NAME>
</HDRCAN>
<SRCCAN/>
<HDRADC_R>
<NAME>reg_adc.h</NAME>
</HDRADC_R>
<HDRADC>
<NAME>adc.h</NAME>
</HDRADC>
<SRCADC/>
<HET1ASMHDR>
<NAME/>
</HET1ASMHDR>
<HET1ASMSRC>
<NAME/>
</HET1ASMSRC>
<STDHDRHET>
<NAME>std_nhet.h</NAME>
</STDHDRHET>
<HDRHET_R>
<NAME>reg_het.h</NAME>
</HDRHET_R>
<HDRHET>
<NAME>het.h</NAME>
</HDRHET>
<HDRHTU_R>
<NAME>reg_htu.h</NAME>
</HDRHTU_R>
<HDRHTU>
<NAME>htu.h</NAME>
</HDRHTU>
<SRCHET/>
<HET2ASMHDR>
<NAME/>
</HET2ASMHDR>
<HET2ASMSRC>
<NAME/>
</HET2ASMSRC>
<HDRESM_R>
<NAME>reg_esm.h</NAME>
</HDRESM_R>
<HDRESM>
<NAME>esm.h</NAME>
</HDRESM>
<SRCESM>
<NAME>esm.c</NAME>
</SRCESM>
<HDRI2C_R>
<NAME>reg_i2c.h</NAME>
</HDRI2C_R>
<HDRI2C>
<NAME>i2c.h</NAME>
</HDRI2C>
<SRCI2C/>
<HDR1EMAC>
<NAME>emac.h</NAME>
</HDR1EMAC>
<HDR2EMAC>
<NAME>hw_emac.h</NAME>
</HDR2EMAC>
<HDR3EMAC>
<NAME>hw_emac_ctrl.h</NAME>
</HDR3EMAC>
<HDR4EMAC>
<NAME>hw_mdio.h</NAME>
</HDR4EMAC>
<HDR5EMAC>
<NAME>hw_reg_access.h</NAME>
</HDR5EMAC>
<HDR6EMAC>
<NAME>mdio.h</NAME>
</HDR6EMAC>
<SRC1EMAC/>
<SRC2EMAC/>
<HDRDCC_R>
<NAME>reg_dcc.h</NAME>
</HDRDCC_R>
<HDRDCC>
<NAME>dcc.h</NAME>
</HDRDCC>
<SRCDCC/>
<HDRRTP_R>
<NAME>reg_rtp.h</NAME>
</HDRRTP_R>
<HDRRTP>
<NAME>rtp.h</NAME>
</HDRRTP>
<SRCRTP/>
<HDRDMM_R>
<NAME>reg_dmm.h</NAME>
</HDRDMM_R>
<HDRDMM>
<NAME>dmm.h</NAME>
</HDRDMM>
<SRCDMM/>
<HDREMIF_R>
<NAME>reg_emif.h</NAME>
</HDREMIF_R>
<HDREMIF>
<NAME>emif.h</NAME>
</HDREMIF>
<SRCEMIF/>
<HDRPOM_R>
<NAME>reg_pom.h</NAME>
</HDRPOM_R>
<HDRPOM>
<NAME>pom.h</NAME>
</HDRPOM>
<SRCPOM/>
<HDR1USB>
<NAME>usbcdc.h</NAME>
</HDR1USB>
<HDR2USB>
<NAME>usb_serial_structs.h</NAME>
</HDR2USB>
<HDR3USB>
<NAME>usbdcdc.h</NAME>
</HDR3USB>
<HDR4USB>
<NAME>usbdevice.h</NAME>
</HDR4USB>
<HDR5USB>
<NAME>usbdevicepriv.h</NAME>
</HDR5USB>
<HDR6USB>
<NAME>usb-ids.h</NAME>
</HDR6USB>
<HDR7USB>
<NAME>usblib.h</NAME>
</HDR7USB>
<HDR8USB>
<NAME>usb.h</NAME>
</HDR8USB>
<HDR9USB>
<NAME>hw_usb.h</NAME>
</HDR9USB>
<SRC1USB/>
<SRC2USB/>
<SRC3USB/>
<SRC5USB/>
<SRC6USB/>
<SRC7USB/>
<SRC8USB/>
<SRC9USB/>
<SRC10USB/>
<HDRCRC_R>
<NAME>reg_crc.h</NAME>
</HDRCRC_R>
<HDRCRC>
<NAME>crc.h</NAME>
</HDRCRC>
<SRCCRC/>
</FILENAMES>
</SYSTEM>
<PINMUX>
<FILENAMES>
<HDRMUX_R>
<PATH>include\reg_pinmux.h</PATH>
</HDRMUX_R>
<HDRMUX>
<PATH>include\pinmux.h</PATH>
</HDRMUX>
<SRCMUX>
<PATH>source\pinmux.c</PATH>
</SRCMUX>
</FILENAMES>
</PINMUX>
<RTI>
<FILENAMES>
<HDRRTI_R>
<PATH>include\reg_rti.h</PATH>
</HDRRTI_R>
<HDRRTI>
<PATH>include\rti.h</PATH>
</HDRRTI>
<SRCRTI>
<PATH>source\rti.c</PATH>
</SRCRTI>
</FILENAMES>
</RTI>
<GIO>
<FILENAMES>
<HDRGIO_R>
<PATH>include\reg_gio.h</PATH>
</HDRGIO_R>
<HDRGIO>
<PATH>include\gio.h</PATH>
</HDRGIO>
<SRCGIO>
<PATH>source\gio.c</PATH>
</SRCGIO>
</FILENAMES>
</GIO>
<SCI>
<FILENAMES>
<HDRSCI_R>
<PATH>include\reg_sci.h</PATH>
</HDRSCI_R>
<HDRSCI>
<PATH>include\sci.h</PATH>
</HDRSCI>
<SRCSCI>
<PATH>source\sci.c</PATH>
</SRCSCI>
</FILENAMES>
</SCI>
<LIN>
<FILENAMES>
<HDRLIN_R>
<PATH>include\reg_lin.h</PATH>
</HDRLIN_R>
<HDRLIN>
<PATH>include\lin.h</PATH>
</HDRLIN>
<SRCLIN>
<PATH/>
</SRCLIN>
</FILENAMES>
</LIN>
<MIBSPI>
<FILENAMES>
<HDRMIBSPI_R>
<PATH>include\reg_mibspi.h</PATH>
</HDRMIBSPI_R>
<HDRMIBSPI>
<PATH>include\mibspi.h</PATH>
</HDRMIBSPI>
<SRCMIBSPI>
<PATH/>
</SRCMIBSPI>
</FILENAMES>
</MIBSPI>
<SPI>
<FILENAMES>
<HDRSPI_R>
<PATH>include\reg_spi.h</PATH>
</HDRSPI_R>
<HDRSPI>
<PATH>include\spi.h</PATH>
</HDRSPI>
<SRCSPI>
<PATH/>
</SRCSPI>
</FILENAMES>
</SPI>
<CAN>
<FILENAMES>
<HDRCAN_R>
<PATH>include\reg_can.h</PATH>
</HDRCAN_R>
<HDRCAN>
<PATH>include\can.h</PATH>
</HDRCAN>
<SRCCAN>
<PATH/>
</SRCCAN>
</FILENAMES>
</CAN>
<ADC>
<FILENAMES>
<HDRADC_R>
<PATH>include\reg_adc.h</PATH>
</HDRADC_R>
<HDRADC>
<PATH>include\adc.h</PATH>
</HDRADC>
<SRCADC>
<PATH/>
</SRCADC>
</FILENAMES>
</ADC>
<HET>
<FILENAMES>
<STDHDRHET>
<PATH>include\std_nhet.h</PATH>
</STDHDRHET>
<HDRHET_R>
<PATH>include\reg_het.h</PATH>
</HDRHET_R>
<HDRHET>
<PATH>include\het.h</PATH>
</HDRHET>
<HDRHTU_R>
<PATH>include\reg_htu.h</PATH>
</HDRHTU_R>
<HDRHTU>
<PATH>include\htu.h</PATH>
</HDRHTU>
<SRCHET>
<PATH/>
</SRCHET>
</FILENAMES>
</HET>
<ESM>
<FILENAMES>
<HDRESM_R>
<PATH>include\reg_esm.h</PATH>
</HDRESM_R>
<HDRESM>
<PATH>include\esm.h</PATH>
</HDRESM>
<SRCESM>
<PATH>source\esm.c</PATH>
</SRCESM>
</FILENAMES>
</ESM>
<I2C>
<FILENAMES>
<HDRI2C_R>
<PATH>include\reg_i2c.h</PATH>
</HDRI2C_R>
<HDRI2C>
<PATH>include\i2c.h</PATH>
</HDRI2C>
<SRCI2C>
<PATH/>
</SRCI2C>
</FILENAMES>
</I2C>
<EMAC>
<FILENAMES>
<HDR1EMAC>
<PATH>include\emac.h</PATH>
</HDR1EMAC>
<HDR2EMAC>
<PATH>include\hw_emac.h</PATH>
</HDR2EMAC>
<HDR3EMAC>
<PATH>include\hw_emac_ctrl.h</PATH>
</HDR3EMAC>
<HDR4EMAC>
<PATH>include\hw_mdio.h</PATH>
</HDR4EMAC>
<HDR5EMAC>
<PATH>include\hw_reg_access.h</PATH>
</HDR5EMAC>
<HDR6EMAC>
<PATH>include\mdio.h</PATH>
</HDR6EMAC>
<SRC1EMAC>
<PATH/>
</SRC1EMAC>
<SRC2EMAC>
<PATH/>
</SRC2EMAC>
</FILENAMES>
</EMAC>
<DCC>
<FILENAMES>
<HDRDCC_R>
<PATH>include\reg_dcc.h</PATH>
</HDRDCC_R>
<HDRDCC>
<PATH>include\dcc.h</PATH>
</HDRDCC>
<SRCDCC>
<PATH/>
</SRCDCC>
</FILENAMES>
</DCC>
<RTP>
<FILENAMES>
<HDRRTP_R>
<PATH>include\reg_rtp.h</PATH>
</HDRRTP_R>
<HDRRTP>
<PATH>include\rtp.h</PATH>
</HDRRTP>
<SRCRTP>
<PATH/>
</SRCRTP>
</FILENAMES>
</RTP>
<DMM>
<FILENAMES>
<HDRDMM_R>
<PATH>include\reg_dmm.h</PATH>
</HDRDMM_R>
<HDRDMM>
<PATH>include\dmm.h</PATH>
</HDRDMM>
<SRCDMM>
<PATH/>
</SRCDMM>
</FILENAMES>
</DMM>
<EMIF>
<FILENAMES>
<HDREMIF_R>
<PATH>include\reg_emif.h</PATH>
</HDREMIF_R>
<HDREMIF>
<PATH>include\emif.h</PATH>
</HDREMIF>
<SRCEMIF>
<PATH/>
</SRCEMIF>
</FILENAMES>
</EMIF>
<POM>
<FILENAMES>
<HDRPOM_R>
<PATH>include\reg_pom.h</PATH>
</HDRPOM_R>
<HDRPOM>
<PATH>include\pom.h</PATH>
</HDRPOM>
<SRCPOM>
<PATH/>
</SRCPOM>
</FILENAMES>
</POM>
<USB>
<FILENAMES>
<HDR1USB>
<PATH>include\usbcdc.h</PATH>
</HDR1USB>
<HDR2USB>
<PATH>include\usb_serial_structs.h</PATH>
</HDR2USB>
<HDR3USB>
<PATH>include\usbdcdc.h</PATH>
</HDR3USB>
<HDR4USB>
<PATH>include\usbdevice.h</PATH>
</HDR4USB>
<HDR5USB>
<PATH>include\usbdevicepriv.h</PATH>
</HDR5USB>
<HDR6USB>
<PATH>include\usb-ids.h</PATH>
</HDR6USB>
<HDR7USB>
<PATH>include\usblib.h</PATH>
</HDR7USB>
<HDR8USB>
<PATH>include\usb.h</PATH>
</HDR8USB>
<HDR9USB>
<PATH>include\hw_usb.h</PATH>
</HDR9USB>
<SRC1USB>
<PATH/>
</SRC1USB>
<SRC2USB>
<PATH/>
</SRC2USB>
<SRC3USB>
<PATH/>
</SRC3USB>
<SRC5USB>
<PATH/>
</SRC5USB>
<SRC6USB>
<PATH/>
</SRC6USB>
<SRC7USB>
<PATH/>
</SRC7USB>
<SRC8USB>
<PATH/>
</SRC8USB>
<SRC9USB>
<PATH/>
</SRC9USB>
<SRC10USB>
<PATH/>
</SRC10USB>
</FILENAMES>
</USB>
<CRC>
<FILENAMES>
<HDRCRC_R>
<PATH>include\reg_crc.h</PATH>
</HDRCRC_R>
<HDRCRC>
<PATH>include\crc.h</PATH>
</HDRCRC>
<SRCCRC>
<PATH/>
</SRCCRC>
</FILENAMES>
</CRC>
</SETTINGS>
bsp/rm48x50/HALCoGen/include/adc.h 0 → 100644
浏览文件 @ 8238f850
/** @file adc.h
* @brief ADC Driver Header File
* @date 29.May.2013
* @version 03.05.02
*
* This file contains:
* - Definitions
* - Types
* - Interface Prototypes
* .
* which are relevant for the ADC driver.
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __ADC_H__
#define __ADC_H__
#include "reg_adc.h"
/* USER CODE BEGIN (0) */
/* USER CODE END */
/* ADC General Definitions */
/** @def adcGROUP0
* @brief Alias name for ADC event group
*
* @note This value should be used for API argument @a group
*/
#define adcGROUP0 0U
/** @def adcGROUP1
* @brief Alias name for ADC group 1
*
* @note This value should be used for API argument @a group
*/
#define adcGROUP1 1U
/** @def adcGROUP2
* @brief Alias name for ADC group 2
*
* @note This value should be used for API argument @a group
*/
#define adcGROUP2 2U
/** @enum adcResolution
* @brief Alias names for data resolution
* This enumeration is used to provide alias names for the data resolution:
* - 12 bit resolution
* - 10 bit resolution
* - 8 bit resolution
*/
enum adcResolution
{
ADC_12_BIT = 0x00000000U, /**< Alias for 12 bit data resolution */
ADC_10_BIT = 0x00000100U, /**< Alias for 10 bit data resolution */
ADC_8_BIT = 0x00000200U /**< Alias for 8 bit data resolution */
};
/** @enum adcFiFoStatus
* @brief Alias names for FiFo status
* This enumeration is used to provide alias names for the current FiFo states:
* - FiFo is not full
* - FiFo is full
* - FiFo overflow occurred
*/
enum adcFiFoStatus
{
ADC_FIFO_IS_NOT_FULL = 0U, /**< Alias for FiFo is not full */
ADC_FIFO_IS_FULL = 1U, /**< Alias for FiFo is full */
ADC_FIFO_OVERFLOW = 3U /**< Alias for FiFo overflow occurred */
};
/** @enum adcConversionStatus
* @brief Alias names for conversion status
* This enumeration is used to provide alias names for the current conversion states:
* - Conversion is not finished
* - Conversion is finished
*/
enum adcConversionStatus
{
ADC_CONVERSION_IS_NOT_FINISHED = 0U, /**< Alias for current conversion is not finished */
ADC_CONVERSION_IS_FINISHED = 8U /**< Alias for current conversion is finished */
};
/** @enum adc1HwTriggerSource
* @brief Alias names for hardware trigger source
* This enumeration is used to provide alias names for the hardware trigger sources:
*/
enum adc1HwTriggerSource
{
ADC1_EVENT = 0U, /**< Alias for event pin */
ADC1_HET1_8 = 1U, /**< Alias for HET1 pin 8 */
ADC1_HET1_10 = 2U, /**< Alias for HET1 pin 10 */
ADC1_RTI_COMP0 = 3U, /**< Alias for RTI compare 0 match */
ADC1_HET1_12 = 4U, /**< Alias for HET1 pin 12 */
ADC1_HET1_14 = 5U, /**< Alias for HET1 pin 14 */
ADC1_GIOB0 = 6U, /**< Alias for GIO port b pin 0 */
ADC1_GIOB1 = 7U, /**< Alias for GIO port b pin 1 */
ADC1_HET2_5 = 1U, /**< Alias for HET2 pin 5 */
ADC1_HET1_27 = 2U, /**< Alias for HET1 pin 27 */
ADC1_HET1_17 = 4U, /**< Alias for HET1 pin 17 */
ADC1_HET1_19 = 5U, /**< Alias for HET1 pin 19 */
ADC1_HET1_11 = 6U, /**< Alias for HET1 pin 11 */
ADC1_HET2_13 = 7U, /**< Alias for HET2 pin 13 */
ADC1_EPWM_B = 1U, /**< Alias for B Signal EPWM */
ADC1_EPWM_A1 = 3U, /**< Alias for A1 Signal EPWM */
ADC1_HET2_1 = 5U, /**< Alias for HET2 pin 1 */
ADC1_EPWM_A2 = 6U, /**< Alias for A2 Signal EPWM */
ADC1_EPWM_AB = 7U /**< Alias for AB Signal EPWM */
};
/** @enum adc2HwTriggerSource
* @brief Alias names for hardware trigger source
* This enumeration is used to provide alias names for the hardware trigger sources:
*/
enum adc2HwTriggerSource
{
ADC2_EVENT = 0U, /**< Alias for event pin */
ADC2_HET1_8 = 1U, /**< Alias for HET1 pin 8 */
ADC2_HET1_10 = 2U, /**< Alias for HET1 pin 10 */
ADC2_RTI_COMP0 = 3U, /**< Alias for RTI compare 0 match */
ADC2_HET1_12 = 4U, /**< Alias for HET1 pin 12 */
ADC2_HET1_14 = 5U, /**< Alias for HET1 pin 14 */
ADC2_GIOB0 = 6U, /**< Alias for GIO port b pin 0 */
ADC2_GIOB1 = 7U, /**< Alias for GIO port b pin 1 */
ADC2_HET2_5 = 1U, /**< Alias for HET2 pin 5 */
ADC2_HET1_27 = 2U, /**< Alias for HET1 pin 27 */
ADC2_HET1_17 = 4U, /**< Alias for HET1 pin 17 */
ADC2_HET1_19 = 5U, /**< Alias for HET1 pin 19 */
ADC2_HET1_11 = 6U, /**< Alias for HET1 pin 11 */
ADC2_HET2_13 = 7U, /**< Alias for HET2 pin 13 */
ADC2_EPWM_B = 1U, /**< Alias for B Signal EPWM */
ADC2_EPWM_A1 = 3U, /**< Alias for A1 Signal EPWM */
ADC2_HET2_1 = 5U, /**< Alias for HET2 pin 1 */
ADC2_EPWM_A2 = 6U, /**< Alias for A2 Signal EPWM */
ADC2_EPWM_AB = 7U /**< Alias for AB Signal EPWM */
};
/* USER CODE BEGIN (1) */
/* USER CODE END */
/** @struct adcData
* @brief ADC Conversion data structure
*
* This type is used to pass adc conversion data.
*/
/** @typedef adcData_t
* @brief ADC Data Type Definition
*/
typedef struct adcData
{
uint32 id; /**< Channel/Pin Id */
uint16 value; /**< Conversion data value */
} adcData_t;
/* USER CODE BEGIN (2) */
/* USER CODE END */
/**
* @defgroup ADC ADC
* @brief Analog To Digital Converter Module.
*
* The microcontroller includes two 12-bit ADC modules with selectable 10-bit or 12-bit resolution
*
* Related Files
* - reg_adc.h
* - adc.h
* - adc.c
* @addtogroup ADC
* @{
*/
/* ADC Interface Functions */
void adcInit(void);
void adcStartConversion(adcBASE_t *adc, uint32 group);
void adcStopConversion(adcBASE_t *adc, uint32 group);
void adcResetFiFo(adcBASE_t *adc, uint32 group);
uint32 adcGetData(adcBASE_t *adc, uint32 group, adcData_t *data);
uint32 adcIsFifoFull(adcBASE_t *adc, uint32 group);
uint32 adcIsConversionComplete(adcBASE_t *adc, uint32 group);
void adcEnableNotification(adcBASE_t *adc, uint32 group);
void adcDisableNotification(adcBASE_t *adc, uint32 group);
void adcCalibration(adcBASE_t *adc);
uint32 adcMidPointCalibration(adcBASE_t *adc);
/** @fn void adcNotification(adcBASE_t *adc, uint32 group)
* @brief Group notification
* @param[in] adc Pointer to ADC node:
* - adcREG1: ADC1 module pointer
* - adcREG2: ADC2 module pointer
* @param[in] group number of ADC node:
* - adcGROUP0: ADC event group
* - adcGROUP1: ADC group 1
* - adcGROUP2: ADC group 2
*
* @note This function has to be provide by the user.
*/
void adcNotification(adcBASE_t *adc, uint32 group);
/**@}*/
/* USER CODE BEGIN (3) */
/* USER CODE END */
#endif
bsp/rm48x50/HALCoGen/include/can.h 0 → 100644
浏览文件 @ 8238f850
/** @file can.h
* @brief CAN Driver Header File
* @date 29.May.2013
* @version 03.05.02
*
* This file contains:
* - Definitions
* - Types
* - Interface Prototypes
* .
* which are relevant for the CAN driver.
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __CAN_H__
#define __CAN_H__
#include "reg_can.h"
/* USER CODE BEGIN (0) */
/* USER CODE END */
/* CAN General Definitions */
/** @def canLEVEL_ACTIVE
* @brief Alias name for CAN error operation level active (Error counter 0-95)
*/
#define canLEVEL_ACTIVE 0x00U
/** @def canLEVEL_WARNING
* @brief Alias name for CAN error operation level warning (Error counter 96-127)
*/
#define canLEVEL_WARNING 0x40U
/** @def canLEVEL_PASSIVE
* @brief Alias name for CAN error operation level passive (Error counter 128-255)
*/
#define canLEVEL_PASSIVE 0x20U
/** @def canLEVEL_BUS_OFF
* @brief Alias name for CAN error operation level bus off (Error counter 256)
*/
#define canLEVEL_BUS_OFF 0x80U
/** @def canERROR_NO
* @brief Alias name for no CAN error occurred
*/
#define canERROR_OK 0U
/** @def canERROR_STUFF
* @brief Alias name for CAN stuff error an RX message
*/
#define canERROR_STUFF 1U
/** @def canERROR_FORMAT
* @brief Alias name for CAN form/format error an RX message
*/
#define canERROR_FORMAT 2U
/** @def canERROR_ACKNOWLEDGE
* @brief Alias name for CAN TX message wasn't acknowledged
*/
#define canERROR_ACKNOWLEDGE 3U
/** @def canERROR_BIT1
* @brief Alias name for CAN TX message sending recessive level but monitoring dominant
*/
#define canERROR_BIT1 4U
/** @def canERROR_BIT0
* @brief Alias name for CAN TX message sending dominant level but monitoring recessive
*/
#define canERROR_BIT0 5U
/** @def canERROR_CRC
* @brief Alias name for CAN RX message received wrong CRC
*/
#define canERROR_CRC 6U
/** @def canERROR_NO
* @brief Alias name for CAN no message has send or received since last call of CANGetLastError
*/
#define canERROR_NO 7U
/** @def canMESSAGE_BOX1
* @brief Alias name for CAN message box 1
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX1 1U
/** @def canMESSAGE_BOX2
* @brief Alias name for CAN message box 2
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX2 2U
/** @def canMESSAGE_BOX3
* @brief Alias name for CAN message box 3
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX3 3U
/** @def canMESSAGE_BOX4
* @brief Alias name for CAN message box 4
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX4 4U
/** @def canMESSAGE_BOX5
* @brief Alias name for CAN message box 5
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX5 5U
/** @def canMESSAGE_BOX6
* @brief Alias name for CAN message box 6
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX6 6U
/** @def canMESSAGE_BOX7
* @brief Alias name for CAN message box 7
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX7 7U
/** @def canMESSAGE_BOX8
* @brief Alias name for CAN message box 8
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX8 8U
/** @def canMESSAGE_BOX9
* @brief Alias name for CAN message box 9
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX9 9U
/** @def canMESSAGE_BOX10
* @brief Alias name for CAN message box 10
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX10 10U
/** @def canMESSAGE_BOX11
* @brief Alias name for CAN message box 11
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX11 11U
/** @def canMESSAGE_BOX12
* @brief Alias name for CAN message box 12
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX12 12U
/** @def canMESSAGE_BOX13
* @brief Alias name for CAN message box 13
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX13 13U
/** @def canMESSAGE_BOX14
* @brief Alias name for CAN message box 14
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX14 14U
/** @def canMESSAGE_BOX15
* @brief Alias name for CAN message box 15
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX15 15U
/** @def canMESSAGE_BOX16
* @brief Alias name for CAN message box 16
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX16 16U
/** @def canMESSAGE_BOX17
* @brief Alias name for CAN message box 17
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX17 17U
/** @def canMESSAGE_BOX18
* @brief Alias name for CAN message box 18
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX18 18U
/** @def canMESSAGE_BOX19
* @brief Alias name for CAN message box 19
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX19 19U
/** @def canMESSAGE_BOX20
* @brief Alias name for CAN message box 20
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX20 20U
/** @def canMESSAGE_BOX21
* @brief Alias name for CAN message box 21
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX21 21U
/** @def canMESSAGE_BOX22
* @brief Alias name for CAN message box 22
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX22 22U
/** @def canMESSAGE_BOX23
* @brief Alias name for CAN message box 23
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX23 23U
/** @def canMESSAGE_BOX24
* @brief Alias name for CAN message box 24
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX24 24U
/** @def canMESSAGE_BOX25
* @brief Alias name for CAN message box 25
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX25 25U
/** @def canMESSAGE_BOX26
* @brief Alias name for CAN message box 26
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX26 26U
/** @def canMESSAGE_BOX27
* @brief Alias name for CAN message box 27
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX27 27U
/** @def canMESSAGE_BOX28
* @brief Alias name for CAN message box 28
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX28 28U
/** @def canMESSAGE_BOX29
* @brief Alias name for CAN message box 29
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX29 29U
/** @def canMESSAGE_BOX30
* @brief Alias name for CAN message box 30
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX30 30U
/** @def canMESSAGE_BOX31
* @brief Alias name for CAN message box 31
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX31 31U
/** @def canMESSAGE_BOX32
* @brief Alias name for CAN message box 32
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX32 32U
/** @def canMESSAGE_BOX33
* @brief Alias name for CAN message box 33
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX33 33U
/** @def canMESSAGE_BOX34
* @brief Alias name for CAN message box 34
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX34 34U
/** @def canMESSAGE_BOX35
* @brief Alias name for CAN message box 35
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX35 35U
/** @def canMESSAGE_BOX36
* @brief Alias name for CAN message box 36
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX36 36U
/** @def canMESSAGE_BOX37
* @brief Alias name for CAN message box 37
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX37 37U
/** @def canMESSAGE_BOX38
* @brief Alias name for CAN message box 38
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX38 38U
/** @def canMESSAGE_BOX39
* @brief Alias name for CAN message box 39
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX39 39U
/** @def canMESSAGE_BOX40
* @brief Alias name for CAN message box 40
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX40 40U
/** @def canMESSAGE_BOX41
* @brief Alias name for CAN message box 41
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX41 41U
/** @def canMESSAGE_BOX42
* @brief Alias name for CAN message box 42
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX42 42U
/** @def canMESSAGE_BOX43
* @brief Alias name for CAN message box 43
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX43 43U
/** @def canMESSAGE_BOX44
* @brief Alias name for CAN message box 44
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX44 44U
/** @def canMESSAGE_BOX45
* @brief Alias name for CAN message box 45
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX45 45U
/** @def canMESSAGE_BOX46
* @brief Alias name for CAN message box 46
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX46 46U
/** @def canMESSAGE_BOX47
* @brief Alias name for CAN message box 47
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX47 47U
/** @def canMESSAGE_BOX48
* @brief Alias name for CAN message box 48
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX48 48U
/** @def canMESSAGE_BOX49
* @brief Alias name for CAN message box 49
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX49 49U
/** @def canMESSAGE_BOX50
* @brief Alias name for CAN message box 50
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX50 50U
/** @def canMESSAGE_BOX51
* @brief Alias name for CAN message box 51
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX51 51U
/** @def canMESSAGE_BOX52
* @brief Alias name for CAN message box 52
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX52 52U
/** @def canMESSAGE_BOX53
* @brief Alias name for CAN message box 53
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX53 53U
/** @def canMESSAGE_BOX54
* @brief Alias name for CAN message box 54
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX54 54U
/** @def canMESSAGE_BOX55
* @brief Alias name for CAN message box 55
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX55 55U
/** @def canMESSAGE_BOX56
* @brief Alias name for CAN message box 56
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX56 56U
/** @def canMESSAGE_BOX57
* @brief Alias name for CAN message box 57
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX57 57U
/** @def canMESSAGE_BOX58
* @brief Alias name for CAN message box 58
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX58 58U
/** @def canMESSAGE_BOX59
* @brief Alias name for CAN message box 59
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX59 59U
/** @def canMESSAGE_BOX60
* @brief Alias name for CAN message box 60
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX60 60U
/** @def canMESSAGE_BOX61
* @brief Alias name for CAN message box 61
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX61 61U
/** @def canMESSAGE_BOX62
* @brief Alias name for CAN message box 62
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX62 62U
/** @def canMESSAGE_BOX63
* @brief Alias name for CAN message box 63
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX63 63U
/** @def canMESSAGE_BOX64
* @brief Alias name for CAN message box 64
*
* @note This value should be used for API argument @a messageBox
*/
#define canMESSAGE_BOX64 64U
/* USER CODE BEGIN (1) */
/* USER CODE END */
/**
* @defgroup CAN CAN
* @brief Controller Area Network Module.
*
* The Controller Area Network is a high-integrity, serial, multi-master communication protocol for distributed
* real-time applications. This CAN module is implemented according to ISO 11898-1 and is suitable for
* industrial, automotive and general embedded communications
*
* Related Files
* - reg_can.h
* - can.h
* - can.c
* @addtogroup CAN
* @{
*/
/* CAN Interface Functions */
void canInit(void);
uint32 canTransmit(canBASE_t *node, uint32 messageBox, const uint8 * data);
uint32 canGetData(canBASE_t *node, uint32 messageBox, uint8 * const data);
uint32 canIsTxMessagePending(canBASE_t *node, uint32 messageBox);
uint32 canIsRxMessageArrived(canBASE_t *node, uint32 messageBox);
uint32 canIsMessageBoxValid(canBASE_t *node, uint32 messageBox);
uint32 canGetLastError(canBASE_t *node);
uint32 canGetErrorLevel(canBASE_t *node);
void canEnableErrorNotification(canBASE_t *node);
void canDisableErrorNotification(canBASE_t *node);
void canIoSetDirection(canBASE_t *node,uint32 TxDir,uint32 RxDir);
void canIoSetPort(canBASE_t *node, uint32 TxValue, uint32 RxValue);
uint32 canIoTxGetBit(canBASE_t *node);
uint32 canIoRxGetBit(canBASE_t *node);
/** @fn void canErrorNotification(canBASE_t *node, uint32 notification)
* @brief Error notification
* @param[in] node Pointer to CAN node:
* - canREG1: CAN1 node pointer
* - canREG2: CAN2 node pointer
* - canREG3: CAN3 node pointer
* @param[in] notification Error notification code:
* - canLEVEL_WARNING (0x40): When RX- or TX error counter are between 96 and 127
* - canLEVEL_BUS_OFF (0x80): When RX- or TX error counter are above 255
*
* @note This function has to be provide by the user.
*/
void canErrorNotification(canBASE_t *node, uint32 notification);
/** @fn void canMessageNotification(canBASE_t *node, uint32 messageBox)
* @brief Message notification
* @param[in] node Pointer to CAN node:
* - canREG1: CAN1 node pointer
* - canREG2: CAN2 node pointer
* - canREG3: CAN3 node pointer
* @param[in] messageBox Message box number of CAN node:
* - canMESSAGE_BOX1: CAN message box 1
* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
* - canMESSAGE_BOX64: CAN message box 64
*
* @note This function has to be provide by the user.
*/
void canMessageNotification(canBASE_t *node, uint32 messageBox);
/**@}*/
/* USER CODE BEGIN (2) */
/* USER CODE END */
#endif
bsp/rm48x50/HALCoGen/include/crc.h 0 → 100644
浏览文件 @ 8238f850
/** @file CRC.h
* @brief CRC Driver Header File
* @date 29.May.2013
* @version 03.05.02
*
* This file contains:
* - Definitions
* - Types
* - Interface Prototypes
* .
* which are relevant for the CRC driver.
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __CRC_H__
#define __CRC_H__
#include "reg_crc.h"
/* USER CODE BEGIN (0) */
/* USER CODE END */
/* CRC General Definitions */
/** @def CRCLEVEL_ACTIVE
* @brief Alias name for CRC error operation level active
*/
#define CRCLEVEL_ACTIVE 0x00U
/** @def CRC_AUTO
* @brief Alias name for CRC auto mode
*/
#define CRC_AUTO 0x00000001U
/** @def CRC_SEMI_CPU
* @brief Alias name for semi cpu mode setting
*/
#define CRC_SEMI_CPU 0x00000002U
/** @def CRC_FULL_CPU
* @brief Alias name for CRC cpu full mode
*/
#define CRC_FULL_CPU 0x00000003U
/** @def CRC_CH4_TO
* @brief Alias name for channel1 time out interrupt flag
*/
#define CRC_CH4_TO 0x10000000U
/** @def CRC_CH4_UR
* @brief Alias name for channel1 underrun interrupt flag
*/
#define CRC_CH4_UR 0x08000000U
/** @def CRC_CH4_OR
* @brief Alias name for channel1 overrun interrupt flag
*/
#define CRC_CH4_OR 0x04000000U
/** @def CRC_CH4_FAIL
* @brief Alias name for channel1 crc fail interrupt flag
*/
#define CRC_CH4_FAIL 0x02000000U
/** @def CRC_CH4_CC
* @brief Alias name for channel1 compression complete interrupt flag
*/
#define CRC_CH4_CC 0x01000000U
/** @def CRC_CH3_TO
* @brief Alias name for channel2 time out interrupt flag
*/
#define CRC_CH3_TO 0x00100000U
/** @def CRC_CH3_UR
* @brief Alias name for channel2 underrun interrupt flag
*/
#define CRC_CH3_UR 0x00080000U
/** @def CRC_CH3_OR
* @brief Alias name for channel2 overrun interrupt flag
*/
#define CRC_CH3_OR 0x00040000U
/** @def CRC_CH3_FAIL
* @brief Alias name for channel2 crc fail interrupt flag
*/
#define CRC_CH3_FAIL 0x00020000U
/** @def CRC_CH3_CC
* @brief Alias name for channel2 compression complete interrupt flag
*/
#define CRC_CH3_CC 0x00010000U
/** @def CRC_CH2_TO
* @brief Alias name for channel3 time out interrupt flag
*/
#define CRC_CH2_TO 0x00001000U
/** @def CRC_CH2_UR
* @brief Alias name for channel3 underrun interrupt flag
*/
#define CRC_CH2_UR 0x00000800U
/** @def CRC_CH2_OR
* @brief Alias name for channel3 overrun interrupt flag
*/
#define CRC_CH2_OR 0x00000400U
/** @def CRC_CH2_FAIL
* @brief Alias name for channel3 crc fail interrupt flag
*/
#define CRC_CH2_FAIL 0x00000200U
/** @def CRC_CH2_CC
* @brief Alias name for channel3 compression complete interrupt flag
*/
#define CRC_CH2_CC 0x00000100U
/** @def CRC_CH1_TO
* @brief Alias name for channel4 time out interrupt flag
*/
#define CRC_CH1_TO 0x00000010U
/** @def CRC_CH1_UR
* @brief Alias name for channel4 underrun interrupt flag
*/
#define CRC_CH1_UR 0x00000008U
/** @def CRC_CH1_OR
* @brief Alias name for channel4 overrun interrupt flag
*/
#define CRC_CH1_OR 0x00000004U
/** @def CRC_CH1_FAIL
* @brief Alias name for channel4 crc fail interrupt flag
*/
#define CRC_CH1_FAIL 0x00000002U
/** @def CRC_CH1_CC
* @brief Alias name for channel4 compression complete interrupt flag
*/
#define CRC_CH1_CC 0x00000001U
/** @struct crcModConfig
* @brief CRC mode specific parameters
*
* This type is used to pass crc mode specific parameters
*/
/** @typedef crcModConfig_t
* @brief CRC Data Type Definition
*/
typedef struct crcModConfig
{
uint32 mode; /**< Mode of operation */
uint32 crc_channel; /**< CRC channel-0,1 */
uint32 * src_data_pat; /**< Pattern data */
uint32 data_length; /**< Pattern data length.Number of 64 bit size word*/
} crcModConfig_t;
/** @struct crcConfig
* @brief CRC configuration for different modes
*
* This type is used to pass crc configuration
*/
/** @typedef crcConfig_t
* @brief CRC Data Type Definition
*/
typedef struct crcConfig
{
uint32 crc_channel; /**< CRC channel-0,1 */
uint32 mode; /**< Mode of operation */
uint32 pcount; /**< Pattern count*/
uint32 scount; /**< Sector count */
uint32 wdg_preload; /**< Watchdog period */
uint32 block_preload; /**< Block period*/
} crcConfig_t;
/* USER CODE BEGIN (1) */
/* USER CODE END */
/**
* @defgroup CRC CRC
* @brief Cyclic Redundancy Check Controller Module.
*
* The CRC controller is a module that is used to perform CRC (Cyclic Redundancy Check) to verify the
* integrity of memory system. A signature representing the contents of the memory is obtained when the
* contents of the memory are read into CRC controller. The responsibility of CRC controller is to calculate
* the signature for a set of data and then compare the calculated signature value against a pre-determined
* good signature value. CRC controller supports two channels to perform CRC calculation on multiple
* memories in parallel and can be used on any memory system.
*
* Related Files
* - reg_crc.h
* - crc.h
* - crc.c
* @addtogroup CRC
* @{
*/
/* CRC Interface Functions */
void crcInit(void);
void crcSendPowerDown(crcBASE_t *crc);
void crcSignGen(crcBASE_t *crc,crcModConfig_t *param);
void crcSetConfig(crcBASE_t *crc,crcConfig_t *param);
uint64 crcGetSectorSig(crcBASE_t *crc,uint32 channel);
uint32 crcGetFailedSector(crcBASE_t *crc,uint32 channel);
uint32 crcGetIntrPend(crcBASE_t *crc,uint32 channel);
void crcChannelReset(crcBASE_t *crc,uint32 channel);
void crcEnableNotification(crcBASE_t *crc, uint32 flags);
void crcDisableNotification(crcBASE_t *crc, uint32 flags);
/** @fn void crcNotification(crcBASE_t *crc, uint32 flags)
* @brief Interrupt callback
* @param[in] crc - crc module base address
* @param[in] flags - copy of error interrupt flags
*
* This is a callback that is provided by the application and is called upon
* an interrupt. The parameter passed to the callback is a copy of the
* interrupt flag register.
*/
void crcNotification(crcBASE_t *crc, uint32 flags);
/**@}*/
/* USER CODE BEGIN (2) */
/* USER CODE END */
#endif
bsp/rm48x50/HALCoGen/include/dcc.h 0 → 100644
浏览文件 @ 8238f850
/** @file dcc.h
* @brief DCC Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __DCC_H__
#define __DCC_H__
#include "reg_dcc.h"
/* DCC General Definitions */
/** @def dcc1CNT0_CLKSRC_HFLPO
* @brief Alias name for DCC1 Counter 0 Clock Source HFLPO
*
* This is an alias name for the Clock Source HFLPO for DCC1 Counter 0.
*
* @note This value should be used for API argument @a cnt0_Clock_Source
*/
#define dcc1CNT0_CLKSRC_HFLPO 0x00000005U
/** @def dcc1CNT0_CLKSRC_TCK
* @brief Alias name for DCC1 Counter 0 Clock Source TCK
*
* This is an alias name for the Clock Source TCK for DCC1 Counter 0.
*
* @note This value should be used for API argument @a cnt0_Clock_Source
*/
#define dcc1CNT0_CLKSRC_TCK 0x0000000AU
/** @def dcc1CNT0_CLKSRC_OSCIN
* @brief Alias name for DCC1 Counter 0 Clock Source OSCIN
*
* This is an alias name for the Clock Source OSCIN for DCC1 Counter 0.
*
* @note This value should be used for API argument @a cnt0_Clock_Source
*/
#define dcc1CNT0_CLKSRC_OSCIN 0x0000000FU
/** @def dcc1CNT1_CLKSRC_PLL1
* @brief Alias name for DCC1 Counter 1 Clock Source PLL1
*
* This is an alias name for the Clock Source PLL for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_PLL1 0x0000A0000U
/** @def dcc1CNT1_CLKSRC_PLL2
* @brief Alias name for DCC1 Counter 1 Clock Source PLL2
*
* This is an alias name for the Clock Source OSCIN for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_PLL2 0x0000A0001U
/** @def dcc1CNT1_CLKSRC_LFLPO
* @brief Alias name for DCC1 Counter 1 Clock Source LFLPO
*
* This is an alias name for the Clock Source LFLPO for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_LFLPO 0x0000A0002U
/** @def dcc1CNT1_CLKSRC_HFLPO
* @brief Alias name for DCC1 Counter 1 Clock Source HFLPO
*
* This is an alias name for the Clock Source HFLPO for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_HFLPO 0x0000A0003U
/** @def dcc1CNT1_CLKSRC_EXTCLKIN1
* @brief Alias name for DCC1 Counter 1 Clock Source EXTCLKIN1
*
* This is an alias name for the Clock Source EXTCLKIN1 for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_EXTCLKIN1 0x0000A0005U
/** @def dcc1CNT1_CLKSRC_EXTCLKIN2
* @brief Alias name for DCC1 Counter 1 Clock Source EXTCLKIN2
*
* This is an alias name for the Clock Source EXTCLKIN2 for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_EXTCLKIN2 0x0000A0006U
/** @def dcc1CNT1_CLKSRC_VCLK
* @brief Alias name for DCC1 Counter 1 Clock Source VCLK
*
* This is an alias name for the Clock Source VCLK for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_VCLK 0x0000A0008U
/** @def dcc1CNT1_CLKSRC_N2HET1_31
* @brief Alias name for DCC1 Counter 1 Clock Source N2HET1_31
*
* This is an alias name for the Clock Source N2HET1_31 for DCC1 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc1CNT1_CLKSRC_N2HET1_31 0x00005000FU
/** @def dcc2CNT0_CLKSRC_TCK
* @brief Alias name for DCC2 Counter 0 Clock Source TCK
*
* This is an alias name for the Clock Source TCK for DCC2 Counter 0.
*
* @note This value should be used for API argument @a cnt0_Clock_Source
*/
#define dcc2CNT0_CLKSRC_TCK 0x0000000AU
/** @def dcc1CNT0_CLKSRC_OSCIN
* @brief Alias name for DCC1 Counter 0 Clock Source OSCIN
*
* This is an alias name for the Clock Source OSCIN for DCC2 Counter 0.
*
* @note This value should be used for API argument @a cnt0_Clock_Source
*/
#define dcc2CNT0_CLKSRC_OSCIN 0x0000000FU
/** @def dcc2CNT1_CLKSRC_VCLK
* @brief Alias name for DCC2 Counter 1 Clock Source VCLK
*
* This is an alias name for the Clock Source VCLK for DCC2 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc2CNT1_CLKSRC_VCLK 0x0000A0008U
/** @def dcc2CNT1_CLKSRC_N2HET1_0
* @brief Alias name for DCC2 Counter 1 Clock Source N2HET2_0
*
* This is an alias name for the Clock Source N2HET2_0 for DCC2 Counter 1.
*
* @note This value should be used for API argument @a cnt1_Clock_Source
*/
#define dcc2CNT1_CLKSRC_N2HET1_0 0x00005000FU
/** @def dccNOTIFICATION_DONE
* @brief Alias name for DCC Done notification
*
* This is an alias name for the DCC Done notification.
*
* @note This value should be used for API argument @a notification
*/
#define dccNOTIFICATION_DONE 0x0000A000U
/** @def dccNOTIFICATION_ERROR
* @brief Alias name for DCC Error notification
*
* This is an alias name for the DCC Error notification.
*
* @note This value should be used for API argument @a notification
*/
#define dccNOTIFICATION_ERROR 0x000000A0U
/** @enum dcc1clocksource
* @brief Alias names for dcc clock sources
*
* This enumeration is used to provide alias names for the clock sources:
*/
enum dcc1clocksource
{
DCC1_CNT0_HF_LPO = 0x5U, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/
DCC1_CNT0_TCK = 0xAU, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 1*/
DCC1_CNT0_OSCIN = 0xFU, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/
DCC1_CNT1_PLL1 = 0x0U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 0*/
DCC1_CNT1_PLL2 = 0x1U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 1*/
DCC1_CNT1_LF_LPO = 0x2U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 2*/
DCC1_CNT1_HF_LPO = 0x3U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 3*/
DCC1_CNT1_EXTCLKIN1 = 0x5U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 4*/
DCC1_CNT1_EXTCLKIN2 = 0x6U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 6*/
DCC1_CNT1_VCLK = 0x8U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 8*/
DCC1_CNT1_N2HET1_31 = 0xAU /**< Alias for DCC1 CNT 1 CLOCK SOURCE 9*/
};
/** @enum dcc2clocksource
* @brief Alias names for dcc clock sources
*
* This enumeration is used to provide alias names for the clock sources:
*/
enum dcc2clocksource
{
DCC2_CNT0_OSCIN = 0xFU, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/
DCC2_CNT0_TCK = 0xAU, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/
DCC2_CNT1_VCLK = 0x8U, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 8*/
DCC2_CNT1_N2HET2_0 = 0xAU /**< Alias for DCC1 CNT 1 CLOCK SOURCE 9*/
};
/* Configuration registers */
typedef struct dcc_config_reg
{
uint32 CONFIG_GCTRL;
uint32 CONFIG_CNT0SEED;
uint32 CONFIG_VALID0SEED;
uint32 CONFIG_CNT1SEED;
uint32 CONFIG_CLKSRC1;
uint32 CONFIG_CLKSRC0;
} dcc_config_reg_t;
/* Configuration registers initial value */
#define DCC1_GCTRL_CONFIGVALUE 0xAU | (0xAU << 4U) | (0x5U << 8U) | (0xAU << 12U)
#define DCC1_CNT0SEED_CONFIGVALUE 39204U
#define DCC1_VALID0SEED_CONFIGVALUE 792U
#define DCC1_CNT1SEED_CONFIGVALUE 495000U
#define DCC1_CLKSRC1_CONFIGVALUE (10U << 12U) | DCC1_CNT1_PLL1
/*SAFETYMCUSW 79 S MR:19.4 <REVIEWED> "Macro filled using GUI parameter cannot be avoided" */
#define DCC1_CLKSRC0_CONFIGVALUE DCC1_CNT0_OSCIN
#define DCC2_GCTRL_CONFIGVALUE 0xAU | (0xAU << 4U) | (0x5U << 8U) | (0xAU << 12U)
#define DCC2_CNT0SEED_CONFIGVALUE 0U
#define DCC2_VALID0SEED_CONFIGVALUE 0U
#define DCC2_CNT1SEED_CONFIGVALUE 0U
#define DCC2_CLKSRC1_CONFIGVALUE (0x5U << 12U) | DCC2_CNT1_VCLK
/*SAFETYMCUSW 79 S MR:19.4 <REVIEWED> "Macro filled using GUI parameter cannot be avoided" */
#define DCC2_CLKSRC0_CONFIGVALUE DCC2_CNT0_OSCIN
/**
* @defgroup DCC DCC
* @brief Dual-Clock Comparator Module
*
* The primary purpose of a DCC module is to measure the frequency of a clock signal using a second
* known clock signal as a reference. This capability can be used to ensure the correct frequency range for
* several different device clock sources, thereby enhancing the system safety metrics.
*
* Related Files
* - reg_dcc.h
* - dcc.h
* - dcc.c
* @addtogroup DCC
* @{
*/
/* DCC Interface Functions */
void dccInit(void);
void dccSetCounter0Seed(dccBASE_t *dcc, uint32 cnt0seed);
void dccSetTolerance(dccBASE_t *dcc, uint32 valid0seed);
void dccSetCounter1Seed(dccBASE_t *dcc, uint32 cnt1seed);
void dccSetSeed(dccBASE_t *dcc, uint32 cnt0seed, uint32 valid0seed, uint32 cnt1seed);
void dccSelectClockSource(dccBASE_t *dcc, uint32 cnt0_Clock_Source, uint32 cnt1_Clock_Source);
void dccEnable(dccBASE_t *dcc);
void dccDisable(dccBASE_t *dcc);
uint32 dccGetErrStatus(dccBASE_t *dcc);
void dccEnableNotification(dccBASE_t *dcc, uint32 notification);
void dccDisableNotification(dccBASE_t *dcc, uint32 notification);
void dcc1GetConfigValue(dcc_config_reg_t *config_reg, config_value_type_t type);
void dcc2GetConfigValue(dcc_config_reg_t *config_reg, config_value_type_t type);
/** @fn void dccNotification(dccBASE_t *dcc,uint32 flags)
* @brief Interrupt callback
* @param[in] dcc - dcc module base address
* @param[in] flags - status flags
*
* This is a callback function provided by the application. It is call when
* a dcc is complete or detected error.
*/
void dccNotification(dccBASE_t *dcc,uint32 flags);
/**@}*/
#endif
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/** @file dmm.h
* @brief DMM Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __DMM_H__
#define __DMM_H__
#include "reg_dmm.h"
/**
* @defgroup DMM DMM
* @brief Data Modification Module.
*
* The DMM module provides the capability to modify data in the entire 4 GB address space of the device from an external peripheral,
* with minimal interruption of the application.
*
* Related Files
* - reg_dmm.h
* - dmm.h
* - dmm.c
* @addtogroup DMM
* @{
*/
/* DMM Interface Functions */
void dmmInit(void);
/**@}*/
#endif
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/**
* \file emac.h
*
* \brief EMAC APIs and macros.
*
* This file contains the driver API prototypes and macro definitions.
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __EMAC_H__
#define __EMAC_H__
#include "sys_common.h"
#include "hw_emac.h"
#ifdef __cplusplus
extern "C" {
#endif
/*****************************************************************************/
/*
** Macros which can be used as speed parameter to the API EMACRMIISpeedSet
*/
#define EMAC_RMIISPEED_10MBPS (0x00000000U)
#define EMAC_RMIISPEED_100MBPS (0x00008000U)
/*
** Macros which can be used as duplexMode parameter to the API
** EMACDuplexSet
*/
#define EMAC_DUPLEX_FULL (0x00000001U)
#define EMAC_DUPLEX_HALF (0x00000000U)
/*
** Macros which can be used as matchFilt parameters to the API
** EMACMACAddrSet
*/
/* Address not used to match/filter incoming packets */
#define EMAC_MACADDR_NO_MATCH_NO_FILTER (0x00000000U)
/* Address will be used to filter incoming packets */
#define EMAC_MACADDR_FILTER (0x00100000U)
/* Address will be used to match incoming packets */
#define EMAC_MACADDR_MATCH (0x00180000U)
/*
** Macros which can be passed as eoiFlag to EMACRxIntAckToClear API
*/
#define EMAC_INT_CORE0_RX (0x1U)
#define EMAC_INT_CORE1_RX (0x5U)
#define EMAC_INT_CORE2_RX (0x9U)
/*
** Macros which can be passed as eoiFlag to EMACTxIntAckToClear API
*/
#define EMAC_INT_CORE0_TX (0x2U)
#define EMAC_INT_CORE1_TX (0x6U)
#define EMAC_INT_CORE2_TX (0xAU)
/*****************************************************************************/
/**
* @defgroup EMACMDIO EMAC/MDIO
* @brief Ethernet Media Access Controller/Management Data Input/Output.
*
* The EMAC controls the flow of packet data from the system to the PHY. The MDIO module controls PHY
* configuration and status monitoring.
*
* Both the EMAC and the MDIO modules interface to the system core through a custom interface that
* allows efficient data transmission and reception. This custom interface is referred to as the EMAC control
* module and is considered integral to the EMAC/MDIO peripheral
*
* Related Files
* - emac.h
* - emac.c
* - hw_emac.h
* - hw_emac_ctrl.h
* - hw_mdio.h
* - hw_reg_access.h
* - mdio.h
* - mdio.c
* @addtogroup EMACMDIO
* @{
*/
/*
** Prototypes for the APIs
*/
extern void EMACTxIntPulseEnable(uint32 emacBase, uint32 emacCtrlBase,
uint32 ctrlCore, uint32 channel);
extern void EMACTxIntPulseDisable(uint32 emacBase, uint32 emacCtrlBase,
uint32 ctrlCore, uint32 channel);
extern void EMACRxIntPulseEnable(uint32 emacBase, uint32 emacCtrlBase,
uint32 ctrlCore, uint32 channel);
extern void EMACRxIntPulseDisable(uint32 emacBase, uint32 emacCtrlBase,
uint32 ctrlCore, uint32 channel);
extern void EMACRMIISpeedSet(uint32 emacBase, uint32 speed);
extern void EMACDuplexSet(uint32 emacBase, uint32 duplexMode);
extern void EMACTxEnable(uint32 emacBase);
extern void EMACRxEnable(uint32 emacBase);
extern void EMACTxHdrDescPtrWrite(uint32 emacBase, uint32 descHdr,
uint32 channel);
extern void EMACRxHdrDescPtrWrite(uint32 emacBase, uint32 descHdr,
uint32 channel);
extern void EMACInit(uint32 emacCtrlBase, uint32 emacBase);
extern void EMACMACSrcAddrSet(uint32 emacBase, uint8 * macAddr);
extern void EMACMACAddrSet(uint32 emacBase, uint32 channel,
uint8 * macAddr, uint32 matchFilt);
extern void EMACMIIEnable(uint32 emacBase);
extern void EMACRxUnicastSet(uint32 emacBase, uint32 channel);
extern void EMACCoreIntAck(uint32 emacBase, uint32 eoiFlag);
extern void EMACTxCPWrite(uint32 emacBase, uint32 channel,
uint32 comPtr);
extern void EMACRxCPWrite(uint32 emacBase, uint32 channel,
uint32 comPtr);
extern void EMACRxBroadCastEnable(uint32 emacBase, uint32 channel);
extern void EMACNumFreeBufSet(uint32 emacBase, uint32 channel,
uint32 nBuf);
extern uint32 EMACIntVectorGet(uint32 emacBase);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* __EMAC_H__ */
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/** @file emif.h
* @brief emif Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef _EMIF_H_
#define _EMIF_H_
#include "reg_emif.h"
/** @enum emif_pins
* @brief Alias for emif pins
*
*/
enum emif_pins
{
emif_wait_pin0 = 0U,
emif_wait_pin1 = 1U
};
/** @enum emif_size
* @brief Alias for emif page size
*
*/
enum emif_size
{
elements_256 = 0U,
elements_512 = 1U,
elements_1024 = 2U,
elements_2048 = 3U
};
/** @enum emif_port
* @brief Alias for emif port
*
*/
enum emif_port
{
emif_8_bit_port = 0U,
emif_16_bit_port = 1U
};
/** @enum emif_pagesize
* @brief Alias for emif pagesize
*
*/
enum emif_pagesize
{
emif_4_words = 0U,
emif_8_words = 1U
};
/** @enum emif_wait_polarity
* @brief Alias for emif wait polarity
*
*/
enum emif_wait_polarity
{
emif_pin_low = 0U,
emif_pin_high = 1U
};
#define PTR (uint32 *)(0x80000000U)
/**
* @defgroup EMIF EMIF
* @brief Error Signaling Module.
*
* This EMIF memory controller is compliant with the JESD21-C SDR SDRAM memories utilizing a 16-bit
* data bus. The purpose of this EMIF is to provide a means for the CPU to connect to a variety of external
* devices including:
* - Single data rate (SDR) SDRAM
* - Asynchronous devices including NOR Flash and SRAM
* The most common use for the EMIF is to interface with both a flash device and an SDRAM device
* simultaneously. contains an example of operating the EMIF in this configuration.
*
* Related Files
* - reg_emif.h
* - emif.h
* - emif.c
* @addtogroup EMIF
* @{
*/
/* EMIF Interface Functions */
void emif_SDRAMInit(void);
void emif_ASYNC1Init(void);
void emif_ASYNC2Init(void);
void emif_ASYNC3Init(void);
/**@}*/
#endif /*EMIF_H_*/
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此差异已折叠。
bsp/rm48x50/HALCoGen/include/gio.h 0 → 100644
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/** @file gio.h
* @brief GIO Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __GIO_H__
#define __GIO_H__
#include "reg_gio.h"
/**
* @defgroup GIO GIO
* @brief General-Purpose Input/Output Module.
*
* The GIO module provides the family of devices with input/output (I/O) capability.
* The I/O pins are bidirectional and bit-programmable.
* The GIO module also supports external interrupt capability.
*
* Related Files
* - reg_gio.h
* - gio.h
* - gio.c
* @addtogroup GIO
* @{
*/
/* GIO Interface Functions */
void gioInit(void);
void gioSetDirection(gioPORT_t *port, uint32 dir);
void gioSetBit(gioPORT_t *port, uint32 bit, uint32 value);
void gioSetPort(gioPORT_t *port, uint32 value);
uint32 gioGetBit(gioPORT_t *port, uint32 bit);
uint32 gioGetPort(gioPORT_t *port);
void gioToggleBit(gioPORT_t *port, uint32 bit);
void gioEnableNotification(gioPORT_t *port, uint32 bit);
void gioDisableNotification(gioPORT_t *port, uint32 bit);
void gioNotification(gioPORT_t *port, sint32 bit);
/**@}*/
#endif
bsp/rm48x50/HALCoGen/include/hal_stdtypes.h 0 → 100644
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/** @file hal_stdtypes.h
* @brief HALCoGen standard types header File
* @date 29.May.2013
* @version 03.05.02
*
* This file contains:
* - Type and Global definitions which are relevant for all drivers.
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __HAL_STDTYPES_H__
#define __HAL_STDTYPES_H__
/* USER CODE BEGIN (0) */
/* USER CODE END */
/************************************************************/
/* Type Definitions */
/************************************************************/
#ifndef _UINT64_DECLARED
typedef unsigned long long uint64;
#define _UINT64_DECLARED
#endif
#ifndef _UINT32_DECLARED
typedef unsigned int uint32;
#define _UINT32_DECLARED
#endif
#ifndef _UINT16_DECLARED
typedef unsigned short uint16;
#define _UINT16_DECLARED
#endif
#ifndef _UINT8_DECLARED
typedef unsigned char uint8;
#define _UINT8_DECLARED
#endif
#ifndef _BOOLEAN_DECLARED
typedef unsigned char boolean;
typedef unsigned char boolean_t;
#define _BOOLEAN_DECLARED
#endif
#ifndef _SINT64_DECLARED
typedef signed long long sint64;
#define _SINT64_DECLARED
#endif
#ifndef _SINT32_DECLARED
typedef signed int sint32;
#define _SINT32_DECLARED
#endif
#ifndef _SINT16_DECLARED
typedef signed short sint16;
#define _SINT16_DECLARED
#endif
#ifndef _SINT8_DECLARED
typedef signed char sint8;
#define _SINT8_DECLARED
#endif
#ifndef _FLOAT32_DECLARED
typedef float float32;
#define _FLOAT32_DECLARED
#endif
#ifndef _FLOAT64_DECLARED
typedef double float64;
#define _FLOAT64_DECLARED
#endif
/************************************************************/
/* Global Definitions */
/************************************************************/
/** @def NULL
* @brief NULL definition
*/
#ifndef NULL
#define NULL ((void *) 0U)
#endif
/** @def TRUE
* @brief definition for TRUE
*/
#ifndef TRUE
#define TRUE (boolean)1U
#endif
/** @def FALSE
* @brief BOOLEAN definition for FALSE
*/
#ifndef FALSE
#define FALSE (boolean)0U
#endif
/* USER CODE BEGIN (1) */
/* USER CODE END */
#endif /* __HAL_STDTYPES_H__ */
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/** @file het.h
* @brief HET Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __HET_H__
#define __HET_H__
#include "reg_het.h"
#include <string.h>
/* USER CODE BEGIN (0) */
/* USER CODE END */
/** @def pwm0
* @brief Pwm signal 0
*
* Alias for pwm signal 0
*/
#define pwm0 0U
/** @def pwm1
* @brief Pwm signal 1
*
* Alias for pwm signal 1
*/
#define pwm1 1U
/** @def pwm2
* @brief Pwm signal 2
*
* Alias for pwm signal 2
*/
#define pwm2 2U
/** @def pwm3
* @brief Pwm signal 3
*
* Alias for pwm signal 3
*/
#define pwm3 3U
/** @def pwm4
* @brief Pwm signal 4
*
* Alias for pwm signal 4
*/
#define pwm4 4U
/** @def pwm5
* @brief Pwm signal 5
*
* Alias for pwm signal 5
*/
#define pwm5 5U
/** @def pwm6
* @brief Pwm signal 6
*
* Alias for pwm signal 6
*/
#define pwm6 6U
/** @def pwm7
* @brief Pwm signal 7
*
* Alias for pwm signal 7
*/
#define pwm7 7U
/** @def edge0
* @brief Edge signal 0
*
* Alias for edge signal 0
*/
#define edge0 0U
/** @def edge1
* @brief Edge signal 1
*
* Alias for edge signal 1
*/
#define edge1 1U
/** @def edge2
* @brief Edge signal 2
*
* Alias for edge signal 2
*/
#define edge2 2U
/** @def edge3
* @brief Edge signal 3
*
* Alias for edge signal 3
*/
#define edge3 3U
/** @def edge4
* @brief Edge signal 4
*
* Alias for edge signal 4
*/
#define edge4 4U
/** @def edge5
* @brief Edge signal 5
*
* Alias for edge signal 5
*/
#define edge5 5U
/** @def edge6
* @brief Edge signal 6
*
* Alias for edge signal 6
*/
#define edge6 6U
/** @def edge7
* @brief Edge signal 7
*
* Alias for edge signal 7
*/
#define edge7 7U
/** @def cap0
* @brief Capture signal 0
*
* Alias for capture signal 0
*/
#define cap0 0U
/** @def cap1
* @brief Capture signal 1
*
* Alias for capture signal 1
*/
#define cap1 1U
/** @def cap2
* @brief Capture signal 2
*
* Alias for capture signal 2
*/
#define cap2 2U
/** @def cap3
* @brief Capture signal 3
*
* Alias for capture signal 3
*/
#define cap3 3U
/** @def cap4
* @brief Capture signal 4
*
* Alias for capture signal 4
*/
#define cap4 4U
/** @def cap5
* @brief Capture signal 5
*
* Alias for capture signal 5
*/
#define cap5 5U
/** @def cap6
* @brief Capture signal 6
*
* Alias for capture signal 6
*/
#define cap6 6U
/** @def cap7
* @brief Capture signal 7
*
* Alias for capture signal 7
*/
#define cap7 7U
/** @def pwmEND_OF_DUTY
* @brief Pwm end of duty
*
* Alias for pwm end of duty notification
*/
#define pwmEND_OF_DUTY 2U
/** @def pwmEND_OF_PERIOD
* @brief Pwm end of period
*
* Alias for pwm end of period notification
*/
#define pwmEND_OF_PERIOD 4U
/** @def pwmEND_OF_BOTH
* @brief Pwm end of duty and period
*
* Alias for pwm end of duty and period notification
*/
#define pwmEND_OF_BOTH 6U
/* USER CODE BEGIN (1) */
/* USER CODE END */
/** @struct hetBase
* @brief HET Register Definition
*
* This structure is used to access the HET module registers.
*/
/** @typedef hetBASE_t
* @brief HET Register Frame Type Definition
*
* This type is used to access the HET Registers.
*/
enum hetPinSelect
{
PIN_HET_0 = 0U,
PIN_HET_1 = 1U,
PIN_HET_2 = 2U,
PIN_HET_3 = 3U,
PIN_HET_4 = 4U,
PIN_HET_5 = 5U,
PIN_HET_6 = 6U,
PIN_HET_7 = 7U,
PIN_HET_8 = 8U,
PIN_HET_9 = 9U,
PIN_HET_10 = 10U,
PIN_HET_11 = 11U,
PIN_HET_12 = 12U,
PIN_HET_13 = 13U,
PIN_HET_14 = 14U,
PIN_HET_15 = 15U,
PIN_HET_16 = 16U,
PIN_HET_17 = 17U,
PIN_HET_18 = 18U,
PIN_HET_19 = 19U,
PIN_HET_20 = 20U,
PIN_HET_21 = 21U,
PIN_HET_22 = 22U,
PIN_HET_23 = 23U,
PIN_HET_24 = 24U,
PIN_HET_25 = 25U,
PIN_HET_26 = 26U,
PIN_HET_27 = 27U,
PIN_HET_28 = 28U,
PIN_HET_29 = 29U,
PIN_HET_30 = 30U,
PIN_HET_31 = 31U
};
/** @struct hetInstructionBase
* @brief HET Instruction Definition
*
* This structure is used to access the HET RAM.
*/
/** @typedef hetINSTRUCTION_t
* @brief HET Instruction Type Definition
*
* This type is used to access a HET Instruction.
*/
typedef volatile struct hetInstructionBase
{
uint32 Program;
uint32 Control;
uint32 Data;
uint32 rsvd1;
} hetINSTRUCTION_t;
/** @struct hetRamBase
* @brief HET RAM Definition
*
* This structure is used to access the HET RAM.
*/
/** @typedef hetRAMBASE_t
* @brief HET RAM Type Definition
*
* This type is used to access the HET RAM.
*/
typedef volatile struct het1RamBase
{
hetINSTRUCTION_t Instruction[160U];
} hetRAMBASE_t;
/** @struct hetSignal
* @brief HET Signal Definition
*
* This structure is used to define a pwm signal.
*/
/** @typedef hetSIGNAL_t
* @brief HET Signal Type Definition
*
* This type is used to access HET Signal Information.
*/
typedef struct hetSignal
{
uint32 duty; /**< Duty cycle in % of the period */
float64 period; /**< Period in us */
} hetSIGNAL_t;
/**
* @defgroup HET HET
* @brief Inter-Integrated Circuit Module.
*
* The HET is a software-controlled timer with a dedicated specialized timer micromachine and a set of 30 instructions.
* The HET micromachine is connected to a port of up to 32 input/output (I/O) pins.
*
* Related Files
* - reg_het.h
* - het.h
* - het.c
* - reg_htu.h
* - htu.h
* - std_nhet.h
* @addtogroup HET
* @{
*/
/* HET Interface Functions */
void hetInit(void);
/* PWM Interface Functions */
void pwmStart(hetRAMBASE_t * hetRAM,uint32 pwm);
void pwmStop(hetRAMBASE_t * hetRAM,uint32 pwm);
void pwmSetDuty(hetRAMBASE_t * hetRAM,uint32 pwm, uint32 pwmDuty);
void pwmSetSignal(hetRAMBASE_t * hetRAM,uint32 pwm, hetSIGNAL_t signal);
hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM,uint32 pwm);
void pwmEnableNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification);
void pwmDisableNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification);
void pwmNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification);
/* Edge Interface Functions */
void edgeResetCounter(hetRAMBASE_t * hetRAM,uint32 edge);
uint32 edgeGetCounter(hetRAMBASE_t * hetRAM,uint32 edge);
void edgeEnableNotification(hetBASE_t * hetREG,uint32 edge);
void edgeDisableNotification(hetBASE_t * hetREG,uint32 edge);
void edgeNotification(hetBASE_t * hetREG,uint32 edge);
/* Captured Signal Interface Functions */
hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM,uint32 cap);
/* Timestamp Interface Functions */
void hetResetTimestamp(hetRAMBASE_t * hetRAM);
uint32 hetGetTimestamp(hetRAMBASE_t * hetRAM);
/** @fn void hetNotification(hetBASE_t *het, uint32 offset)
* @brief het interrupt callback
* @param[in] het - Het module base address
* - hetREG1: HET1 module base address pointer
* - hetREG2: HET2 module base address pointer
* @param[in] offset - het interrupt offset / Source number
*
* @note This function has to be provide by the user.
*
* This is a interrupt callback that is provided by the application and is call upon
* an het interrupt. The parameter passed to the callback is a copy of the interrupt
* offset register which is used to decode the interrupt source.
*/
void hetNotification(hetBASE_t *het, uint32 offset);
/**@}*/
/* USER CODE BEGIN (2) */
/* USER CODE END */
#endif
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/** @file htu.h
* @brief HTU Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __HTU_H__
#define __HTU_H__
#include "reg_htu.h"
/* HTU General Definitions */
#define HTU1PARLOC (*(volatile uint32 *)0xFF4E0200U)
#define HTU2PARLOC (*(volatile uint32 *)0xFF4C0200U)
#define HTU1RAMLOC (*(volatile uint32 *)0xFF4E0000U)
#define HTU2RAMLOC (*(volatile uint32 *)0xFF4C0000U)
#endif
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/*
* hw_emac1.h
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef _HW_EMAC_CTRL_H_
#define _HW_EMAC_CTRL_H_
#ifdef __cplusplus
extern "C" {
#endif
#define EMAC_CTRL_REVID (0x0U)
#define EMAC_CTRL_SOFTRESET (0x4U)
#define EMAC_CTRL_INTCONTROL (0xCU)
#define EMAC_CTRL_C0RXTHRESHEN (0x10U)
#define EMAC_CTRL_CnRXEN(n) (0x14u + ((n) << 4))
#define EMAC_CTRL_CnTXEN(n) (0x18u + ((n) << 4))
#define EMAC_CTRL_CnMISCEN(n) (0x1Cu + ((n) << 4))
#define EMAC_CTRL_CnRXTHRESHEN(n) (0x20u + ((n) << 4))
#define EMAC_CTRL_C0RXTHRESHSTAT (0x40U)
#define EMAC_CTRL_C0RXSTAT (0x44U)
#define EMAC_CTRL_C0TXSTAT (0x48U)
#define EMAC_CTRL_C0MISCSTAT (0x4CU)
#define EMAC_CTRL_C1RXTHRESHSTAT (0x50U)
#define EMAC_CTRL_C1RXSTAT (0x54U)
#define EMAC_CTRL_C1TXSTAT (0x58U)
#define EMAC_CTRL_C1MISCSTAT (0x5CU)
#define EMAC_CTRL_C2RXTHRESHSTAT (0x60U)
#define EMAC_CTRL_C2RXSTAT (0x64U)
#define EMAC_CTRL_C2TXSTAT (0x68U)
#define EMAC_CTRL_C2MISCSTAT (0x6CU)
#define EMAC_CTRL_C0RXIMAX (0x70U)
#define EMAC_CTRL_C0TXIMAX (0x74U)
#define EMAC_CTRL_C1RXIMAX (0x78U)
#define EMAC_CTRL_C1TXIMAX (0x7CU)
#define EMAC_CTRL_C2RXIMAX (0x80U)
#define EMAC_CTRL_C2TXIMAX (0x84U)
/**************************************************************************\
* Field Definition Macros
\**************************************************************************/
#ifdef __cplusplus
}
#endif
#endif
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/*
* hw_mdio.h
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef _HW_MDIO_H_
#define _HW_MDIO_H_
#ifdef __cplusplus
extern "C" {
#endif
#define MDIO_BASE (0xFCF78900U)
#define MDIO_REVID (0x0U)
#define MDIO_CONTROL (0x4U)
#define MDIO_ALIVE (0x8U)
#define MDIO_LINK (0xCU)
#define MDIO_LINKINTRAW (0x10U)
#define MDIO_LINKINTMASKED (0x14U)
#define MDIO_USERINTRAW (0x20U)
#define MDIO_USERINTMASKED (0x24U)
#define MDIO_USERINTMASKSET (0x28U)
#define MDIO_USERINTMASKCLEAR (0x2CU)
#define MDIO_USERACCESS0 (0x80U)
#define MDIO_USERPHYSEL0 (0x84U)
#define MDIO_USERACCESS1 (0x88U)
#define MDIO_USERPHYSEL1 (0x8CU)
/**************************************************************************\
* Field Definition Macros
\**************************************************************************/
/* REVID */
#define MDIO_REVID_REV (0xFFFFFFFFU)
#define MDIO_REVID_REV_SHIFT (0x00000000U)
/* CONTROL */
#define MDIO_CONTROL_IDLE (0x80000000U)
#define MDIO_CONTROL_IDLE_SHIFT (0x0000001FU)
/*----IDLE Tokens----*/
#define MDIO_CONTROL_IDLE_NO (0x00000000U)
#define MDIO_CONTROL_IDLE_YES (0x00000001U)
#define MDIO_CONTROL_ENABLE (0x40000000U)
#define MDIO_CONTROL_ENABLE_SHIFT (0x0000001EU)
#define MDIO_CONTROL_HIGHEST_USER_CHANNEL (0x1F000000U)
#define MDIO_CONTROL_HIGHEST_USER_CHANNEL_SHIFT (0x00000018U)
#define MDIO_CONTROL_PREAMBLE (0x00100000U)
#define MDIO_CONTROL_PREAMBLE_SHIFT (0x00000014U)
/*----PREAMBLE Tokens----*/
#define MDIO_CONTROL_FAULT (0x00080000U)
#define MDIO_CONTROL_FAULT_SHIFT (0x00000013U)
#define MDIO_CONTROL_FAULTENB (0x00040000U)
#define MDIO_CONTROL_FAULTENB_SHIFT (0x00000012U)
/*----FAULTENB Tokens----*/
#define MDIO_CONTROL_CLKDIV (0x0000FFFFU)
#define MDIO_CONTROL_CLKDIV_SHIFT (0x00000000U)
/*----CLKDIV Tokens----*/
/* ALIVE */
#define MDIO_ALIVE_REGVAL (0xFFFFFFFFU)
#define MDIO_ALIVE_REGVAL_SHIFT (0x00000000U)
/* LINK */
#define MDIO_LINK_REGVAL (0xFFFFFFFFU)
#define MDIO_LINK_REGVAL_SHIFT (0x00000000U)
/* LINKINTRAW */
#define MDIO_LINKINTRAW_USERPHY1 (0x00000002U)
#define MDIO_LINKINTRAW_USERPHY1_SHIFT (0x00000001U)
#define MDIO_LINKINTRAW_USERPHY0 (0x00000001U)
#define MDIO_LINKINTRAW_USERPHY0_SHIFT (0x00000000U)
/* LINKINTMASKED */
#define MDIO_LINKINTMASKED_USERPHY1 (0x00000002U)
#define MDIO_LINKINTMASKED_USERPHY1_SHIFT (0x00000001U)
#define MDIO_LINKINTMASKED_USERPHY0 (0x00000001U)
#define MDIO_LINKINTMASKED_USERPHY0_SHIFT (0x00000000U)
/* USERINTRAW */
#define MDIO_USERINTRAW_USERACCESS1 (0x00000002U)
#define MDIO_USERINTRAW_USERACCESS1_SHIFT (0x00000001U)
#define MDIO_USERINTRAW_USERACCESS0 (0x00000001U)
#define MDIO_USERINTRAW_USERACCESS0_SHIFT (0x00000000U)
/* USERINTMASKED */
#define MDIO_USERINTMASKED_USERACCESS1 (0x00000002U)
#define MDIO_USERINTMASKED_USERACCESS1_SHIFT (0x00000001U)
#define MDIO_USERINTMASKED_USERACCESS0 (0x00000001U)
#define MDIO_USERINTMASKED_USERACCESS0_SHIFT (0x00000000U)
/* USERINTMASKSET */
#define MDIO_USERINTMASKSET_USERACCESS1 (0x00000002U)
#define MDIO_USERINTMASKSET_USERACCESS1_SHIFT (0x00000001U)
#define MDIO_USERINTMASKSET_USERACCESS0 (0x00000001U)
#define MDIO_USERINTMASKSET_USERACCESS0_SHIFT (0x00000000U)
/* USERINTMASKCLEAR */
#define MDIO_USERINTMASKCLEAR_USERACCESS1 (0x00000002U)
#define MDIO_USERINTMASKCLEAR_USERACCESS1_SHIFT (0x00000001U)
#define MDIO_USERINTMASKCLEAR_USERACCESS0 (0x00000001U)
#define MDIO_USERINTMASKCLEAR_USERACCESS0_SHIFT (0x00000000U)
/* USERACCESS0 */
#define MDIO_USERACCESS0_GO (0x80000000U)
#define MDIO_USERACCESS0_GO_SHIFT (0x0000001FU)
#define MDIO_USERACCESS0_WRITE (0x40000000U)
#define MDIO_USERACCESS0_READ (0x00000000U)
#define MDIO_USERACCESS0_WRITE_SHIFT (0x0000001EU)
#define MDIO_USERACCESS0_ACK (0x20000000U)
#define MDIO_USERACCESS0_ACK_SHIFT (0x0000001DU)
#define MDIO_USERACCESS0_REGADR (0x03E00000U)
#define MDIO_USERACCESS0_REGADR_SHIFT (0x00000015U)
#define MDIO_USERACCESS0_PHYADR (0x001F0000U)
#define MDIO_USERACCESS0_PHYADR_SHIFT (0x00000010U)
#define MDIO_USERACCESS0_DATA (0x0000FFFFU)
#define MDIO_USERACCESS0_DATA_SHIFT (0x00000000U)
/* USERPHYSEL0 */
#define MDIO_USERPHYSEL0_LINKSEL (0x00000080U)
#define MDIO_USERPHYSEL0_LINKSEL_SHIFT (0x00000007U)
#define MDIO_USERPHYSEL0_LINKINTENB (0x00000040U)
#define MDIO_USERPHYSEL0_LINKINTENB_SHIFT (0x00000006U)
#define MDIO_USERPHYSEL0_PHYADRMON (0x0000001FU)
#define MDIO_USERPHYSEL0_PHYADRMON_SHIFT (0x00000000U)
/* USERACCESS1 */
#define MDIO_USERACCESS1_GO (0x80000000U)
#define MDIO_USERACCESS1_GO_SHIFT (0x0000001FU)
#define MDIO_USERACCESS1_WRITE (0x40000000U)
#define MDIO_USERACCESS1_WRITE_SHIFT (0x0000001EU)
#define MDIO_USERACCESS1_ACK (0x20000000U)
#define MDIO_USERACCESS1_ACK_SHIFT (0x0000001DU)
#define MDIO_USERACCESS1_REGADR (0x03E00000U)
#define MDIO_USERACCESS1_REGADR_SHIFT (0x00000015U)
#define MDIO_USERACCESS1_PHYADR (0x001F0000U)
#define MDIO_USERACCESS1_PHYADR_SHIFT (0x00000010U)
#define MDIO_USERACCESS1_DATA (0x0000FFFFU)
#define MDIO_USERACCESS1_DATA_SHIFT (0x00000000U)
/* USERPHYSEL1 */
#define MDIO_USERPHYSEL1_LINKSEL (0x00000080U)
#define MDIO_USERPHYSEL1_LINKSEL_SHIFT (0x00000007U)
#define MDIO_USERPHYSEL1_LINKINTENB (0x00000040U)
#define MDIO_USERPHYSEL1_LINKINTENB_SHIFT (0x00000006U)
#define MDIO_USERPHYSEL1_PHYADRMON (0x0000001FU)
#define MDIO_USERPHYSEL1_PHYADRMON_SHIFT (0x00000000U)
#ifdef __cplusplus
}
#endif
#endif
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/*
* hw_reg_access.h.h
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef _HW_REG_ACCESS_H_
#define _HW_REG_ACCESS_H_
/*******************************************************************************
*
* Macros for hardware access, both direct and via the bit-band region.
*
*****************************************************************************/
#define HWREG(x) \
(*((volatile uint32 *)(x)))
#define HWREGH(x) \
(*((volatile uint16 *)(x)))
#define HWREGB(x) \
(*((volatile uint8 *)(x)))
#define HWREGBITW(x, b) \
HWREG(((uint32)(x) & 0xF0000000U) | 0x02000000U | \
(((uint32)(x) & 0x000FFFFFU) << 5U) | ((b) << 2U))
#define HWREGBITH(x, b) \
HWREGH(((uint32)(x) & 0xF0000000U) | 0x02000000U | \
(((uint32)(x) & 0x000FFFFFU) << 5U) | ((b) << 2U))
#define HWREGBITB(x, b) \
HWREGB(((uint32)(x) & 0xF0000000U) | 0x02000000U | \
(((uint32)(x) & 0x000FFFFFU) << 5U) | ((b) << 2U))
#endif /* __HW_TYPES_H__ */
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/** @file I2C.h
* @brief I2C Driver Definition File
* @date 29.May.2013
* @version 03.05.02
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __I2C_H__
#define __I2C_H__
#include "reg_i2c.h"
/** @enum i2cMode
* @brief Alias names for i2c modes
* This enumeration is used to provide alias names for I2C modes:
*/
enum i2cMode
{
I2C_FD_FORMAT = 0x0008U, /* Free Data Format */
I2C_START_BYTE = 0x0010U,
I2C_RESET_OUT = 0x0020U, I2C_RESET_IN = 0x0000U,
I2C_DLOOPBACK = 0x0040U,
I2C_REPEATMODE = 0x0080U, /* In Master Mode only */
I2C_10BIT_AMODE = 0x0100U, I2C_7BIT_AMODE = 0x0000U,
I2C_TRANSMITTER = 0x0200U, I2C_RECEIVER = 0x0000U,
I2C_MASTER = 0x0400U, I2C_SLAVE = 0x0000U,
I2C_STOP_COND = 0x0800U, /* In Master Mode only */
I2C_START_COND = 0x2000U, /* In Master Mode only */
I2C_FREE_RUN = 0x4000U,
I2C_NACK_MODE = 0x8000U
};
/** @enum i2cBitCount
* @brief Alias names for i2c bit count
* This enumeration is used to provide alias names for I2C bit count:
*/
enum i2cBitCount
{
I2C_2_BIT = 0x2U,
I2C_3_BIT = 0x3U,
I2C_4_BIT = 0x4U,
I2C_5_BIT = 0x5U,
I2C_6_BIT = 0x6U,
I2C_7_BIT = 0x7U,
I2C_8_BIT = 0x0U
};
/** @enum i2cIntFlags
* @brief Interrupt Flag Definitions
*
* Used with I2CEnableNotification, I2CDisableNotification
*/
enum i2cIntFlags
{
I2C_AL_INT = 0x0001U, /* arbitration lost */
I2C_NACK_INT = 0x0002U, /* no acknowledgment */
I2C_ARDY_INT = 0x0004U, /* access ready */
I2C_RX_INT = 0x0008U, /* receive data ready */
I2C_TX_INT = 0x0010U, /* transmit data ready */
I2C_SCD_INT = 0x0020U, /* stop condition detect */
I2C_AAS_INT = 0x0040U /* address as slave */
};
/** @enum i2cStatFlags
* @brief Interrupt Status Definitions
*
*/
enum i2cStatFlags
{
I2C_AL = 0x0001U, /* arbitration lost */
I2C_NACK = 0x0002U, /* no acknowledgement */
I2C_ARDY = 0x0004U, /* access ready */
I2C_RX = 0x0008U, /* receive data ready */
I2C_TX = 0x0010U, /* transmit data ready */
I2C_SCD = 0x0020U, /* stop condition detect */
I2C_AD0 = 0x0100U, /* address Zero Status */
I2C_AAS = 0x0200U, /* address as slave */
I2C_XSMT = 0x0400U, /* Transmit shift empty not */
I2C_RXFULL = 0x0800U, /* receive full */
I2C_BUSBUSY = 0x1000U, /* bus busy */
I2C_NACKSNT = 0x2000U, /* No Ack Sent */
I2C_SDIR = 0x4000U /* Slave Direction */
};
/** @enum i2cDMA
* @brief I2C DMA definitions
*
* Used before i2c transfer
*/
enum i2cDMA
{
I2C_TXDMA = 0x20U,
I2C_RXDMA = 0x10U
};
/**
* @defgroup I2C I2C
* @brief Inter-Integrated Circuit Module.
*
* The I2C is a multi-master communication module providing an interface between the Texas Instruments (TI) microcontroller
* and devices compliant with Philips Semiconductor I2C-bus specification version 2.1 and connected by an I2Cbus.
* This module will support any slave or master I2C compatible device.
*
* Related Files
* - reg_i2c.h
* - i2c.h
* - i2c.c
* @addtogroup I2C
* @{
*/
/* I2C Interface Functions */
void i2cInit(void);
void i2cSetOwnAdd(i2cBASE_t *i2c, uint32 oadd);
void i2cSetSlaveAdd(i2cBASE_t *i2c, uint32 sadd);
void i2cSetBaudrate(i2cBASE_t *i2c, uint32 baud);
uint32 i2cIsTxReady(i2cBASE_t *i2c);
void i2cSendByte(i2cBASE_t *i2c, uint8 byte);
void i2cSend(i2cBASE_t *i2c, uint32 length, uint8 * data);
uint32 i2cIsRxReady(i2cBASE_t *i2c);
void i2cClearSCD(i2cBASE_t *i2c);
uint32 i2cRxError(i2cBASE_t *i2c);
uint32 i2cReceiveByte(i2cBASE_t *i2c);
void i2cReceive(i2cBASE_t *i2c, uint32 length, uint8 * data);
void i2cEnableNotification(i2cBASE_t *i2c, uint32 flags);
void i2cDisableNotification(i2cBASE_t *i2c, uint32 flags);
void i2cSetStart(i2cBASE_t *i2c);
void i2cSetStop(i2cBASE_t *i2c);
void i2cSetCount(i2cBASE_t *i2c ,uint32 cnt);
void i2cEnableLoopback(i2cBASE_t *i2c);
void i2cDisableLoopback(i2cBASE_t *i2c);
/** @fn void i2cNotification(i2cBASE_t *i2c, uint32 flags)
* @brief Interrupt callback
* @param[in] i2c - I2C module base address
* @param[in] flags - copy of error interrupt flags
*
* This is a callback that is provided by the application and is called apon
* an interrupt. The parameter passed to the callback is a copy of the
* interrupt flag register.
*/
void i2cNotification(i2cBASE_t *i2c, uint32 flags);
/**@}*/
#endif
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bsp/rm48x50/HALCoGen/include/reg_lin.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_mibspi.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_pbist.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_pcr.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_pinmux.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_pmm.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_pom.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_rti.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_rtp.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_sci.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_spi.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_stc.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_system.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_tcram.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/reg_vim.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/rti.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/rtp.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sci.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/spi.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/std_nhet.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_common.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_core.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_dma.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_mpu.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_pcr.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_pmm.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_pmu.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_selftest.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/sys_vim.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/system.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usb-ids.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usb.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usb_serial_structs.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usbcdc.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usbdcdc.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usbdevice.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usbdevicepriv.h 0 → 100644
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bsp/rm48x50/HALCoGen/include/usblib.h 0 → 100644
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bsp/rm48x50/HALCoGen/misra-c.txt 0 → 100644
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bsp/rm48x50/HALCoGen/source/dabort.asm 0 → 100644
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bsp/rm48x50/HALCoGen/source/esm.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/gio.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/notification.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/pinmux.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/rti.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sci.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_core.asm 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_dma.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_intvecs.asm 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_link.cmd 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_main.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_mpu.asm 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_pcr.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_phantom.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_pmm.c 0 → 100644
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此差异已折叠。
bsp/rm48x50/HALCoGen/source/sys_pmu.asm 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_selftest.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_startup.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/sys_vim.c 0 → 100644
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bsp/rm48x50/HALCoGen/source/system.c 0 → 100644
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bsp/rm48x50/application/application.c 0 → 100644
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bsp/rm48x50/application/reg_test.asm 0 → 100644
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bsp/rm48x50/application/startup.c 0 → 100644
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bsp/rm48x50/drivers/SConscript 0 → 100644
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bsp/rm48x50/drivers/board.c 0 → 100644
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bsp/rm48x50/drivers/board.h 0 → 100644
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bsp/rm48x50/drivers/drv_uart.c 0 → 100644
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bsp/rm48x50/drivers/drv_uart.h 0 → 100644
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bsp/rm48x50/rtconfig.h 0 → 100644
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components/finsh/finsh.h
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components/finsh/shell.c
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include/rtdef.h
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include/rtthread.h
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libcpu/arm/cortex-r4/RM48x50.h 0 → 100644
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libcpu/arm/cortex-r4/context_ccs.asm 0 → 100644
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libcpu/arm/cortex-r4/cpu.c 0 → 100644
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libcpu/arm/cortex-r4/interrupt.c 0 → 100644
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libcpu/arm/cortex-r4/stack.c 0 → 100644
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libcpu/arm/cortex-r4/trap.c 0 → 100644
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此差异已折叠。
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