STM32F0 has PCLK=48MHz and maximum ADC clock is 14MHz so use PCLK/4=12MHz
to stay within spec of the ADC peripheral.  In pyb.ADC set common sampling
time to approx 4uS for internal and external sources.  In machine.ADC
reduce sample time to approx 1uS for external source, leave internal at
maximum sampling time.