HC32F460PETB移植rt-thread。移植验证通过pin驱动，uart驱动（包含uart1，2，3，4），默认使用uart4。

bsp/Copyright_Notice.md

@@ -216,6 +216,18 @@ Path:
 - bsp/hc32f4a0/Libraries/CMSIS
 - bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver
 
+### hc32f460
+
+License: bsd-new
+
+Copyright: Copyright (c) 2020, Huada Semiconductor Co., Ltd.
+
+Path:
+
+- bsp/hc32f460/Libraries/CMSIS
+- bsp/hc32f460/Libraries/HC32F460_StdPeriph_Driver
+
+
 ### hk32
 
 License: free-unknown

bsp/hc32f460/.config

+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Project Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_RT_USING_TIMER_SOFT=y
+CONFIG_RT_TIMER_THREAD_PRIO=4
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+# CONFIG_RT_USING_ASM_MEMCPY is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+# CONFIG_RT_USING_MEMHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
+# CONFIG_RT_PRINTF_LONGLONG is not set
+CONFIG_RT_VER_NUM=0x40004
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+CONFIG_RT_USING_DFS=y
+CONFIG_DFS_USING_WORKDIR=y
+CONFIG_DFS_FILESYSTEMS_MAX=4
+CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
+CONFIG_DFS_FD_MAX=16
+# CONFIG_RT_USING_DFS_MNTTABLE is not set
+# CONFIG_RT_USING_DFS_ELMFAT is not set
+CONFIG_RT_USING_DFS_DEVFS=y
+# CONFIG_RT_USING_DFS_ROMFS is not set
+# CONFIG_RT_USING_DFS_RAMFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_USING_SERIAL_V1=y
+# CONFIG_RT_USING_SERIAL_V2 is not set
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_USING_POSIX=y
+# CONFIG_RT_USING_POSIX_MMAP is not set
+# CONFIG_RT_USING_POSIX_TERMIOS is not set
+# CONFIG_RT_USING_POSIX_GETLINE is not set
+# CONFIG_RT_USING_POSIX_AIO is not set
+# CONFIG_RT_USING_MODULE is not set
+CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_RT_LINK is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+# CONFIG_PKG_USING_ZB_COORDINATOR is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+# CONFIG_PKG_USING_RT_LINK_HW is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+# CONFIG_PKG_USING_PIKASCRIPT is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set
+
+#
+# system packages
+#
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set
+# CONFIG_PKG_USING_ARM_2D is not set
+# CONFIG_PKG_USING_WCWIDTH is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set
+# CONFIG_PKG_USING_MCP23008 is not set
+# CONFIG_PKG_USING_BLUETRUM_SDK is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
+
+#
+# miscellaneous packages
+#
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_CMATRIX is not set
+# CONFIG_PKG_USING_SL is not set
+# CONFIG_PKG_USING_CAL is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_COWSAY is not set
+# CONFIG_PKG_USING_TERMBOX is not set
+
+#
+# Hardware Drivers Config
+#
+CONFIG_MCU_HC32F460=y
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+CONFIG_BSP_USING_UART=y
+# CONFIG_BSP_USING_UART1 is not set
+# CONFIG_BSP_USING_UART2 is not set
+# CONFIG_BSP_USING_UART3 is not set
+CONFIG_BSP_USING_UART4=y

bsp/hc32f460/.gitignore

+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h

bsp/hc32f460/.ignore_format.yml

+# files format check exclude path, please follow the instructions below to modify;
+# If you need to exclude an entire folder, add the folder path in dir_path;
+# If you need to exclude a file, add the path to the file in file_path.
+
+file_path:
+
+dir_path:
+- Libraries
\ No newline at end of file

bsp/hc32f460/EventRecorderStub.scvd

+<?xml version="1.0" encoding="utf-8"?>
+
+<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
+
+<component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
+  <events>
+  </events>
+
+</component_viewer>

bsp/hc32f460/Kconfig

+mainmenu "RT-Thread Project Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "board/Kconfig"
+
+
+

bsp/hc32f460/Libraries/CMSIS/Device/HDSC/HC32F460/Include/ddl_config.h

+/*******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ */
+/******************************************************************************/
+/** \file ddl_config.h
+ **
+ ** A detailed description is available at
+ ** @link DdlConfigGroup Ddl Config description @endlink
+ **
+ **   - 2018-10-18  CDT  First version for Device Driver Library config.
+ **
+ ******************************************************************************/
+#ifndef __DDL_CONFIG_H__
+#define __DDL_CONFIG_H__
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ *******************************************************************************
+ ** \defgroup DdlConfigGroup Device Driver Library config(DDLCONFIG)
+ **
+ ******************************************************************************/
+//@{
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+/*! Chip module on-off define */
+#define DDL_ON                                      (1u)
+#define DDL_OFF                                     (0u)
+
+/**
+ *******************************************************************************
+ ** \brief This is the list of modules to be used in the device driver library
+ ** Select the modules you need to use to DDL_ON.
+ **
+ ** \note DDL_ICG_ENABLE must be turned on(DDL_ON) to ensure that the chip works
+ ** properly.
+ **
+ ** \note DDL_UTILITY_ENABLE must be turned on(DDL_ON) if using Device Driver
+ ** Library.
+ **
+ ** \note DDL_PRINT_ENABLE must be turned on(DDL_ON) if using printf function.
+ ******************************************************************************/
+#define DDL_ICG_ENABLE                              (DDL_ON)
+#define DDL_UTILITY_ENABLE                          (DDL_ON)
+#define DDL_PRINT_ENABLE                            (DDL_ON)
+
+#define DDL_ADC_ENABLE                              (DDL_OFF)
+#define DDL_AES_ENABLE                              (DDL_OFF)
+#define DDL_CAN_ENABLE                              (DDL_OFF)
+#define DDL_CLK_ENABLE                              (DDL_ON)
+#define DDL_CMP_ENABLE                              (DDL_OFF)
+#define DDL_CRC_ENABLE                              (DDL_OFF)
+#define DDL_DCU_ENABLE                              (DDL_OFF)
+#define DDL_DMAC_ENABLE                             (DDL_ON)
+#define DDL_EFM_ENABLE                              (DDL_ON)
+#define DDL_EMB_ENABLE                              (DDL_OFF)
+#define DDL_EVENT_PORT_ENABLE                       (DDL_OFF)
+#define DDL_EXINT_NMI_SWI_ENABLE                    (DDL_ON)
+#define DDL_GPIO_ENABLE                             (DDL_ON)
+#define DDL_HASH_ENABLE                             (DDL_OFF)
+#define DDL_I2C_ENABLE                              (DDL_OFF)
+#define DDL_I2S_ENABLE                              (DDL_OFF)
+#define DDL_INTERRUPTS_ENABLE                       (DDL_ON)
+#define DDL_KEYSCAN_ENABLE                          (DDL_OFF)
+#define DDL_MPU_ENABLE                              (DDL_OFF)
+#define DDL_OTS_ENABLE                              (DDL_OFF)
+#define DDL_PWC_ENABLE                              (DDL_ON)
+#define DDL_QSPI_ENABLE                             (DDL_OFF)
+#define DDL_RMU_ENABLE                              (DDL_OFF)
+#define DDL_RTC_ENABLE                              (DDL_OFF)
+#define DDL_SDIOC_ENABLE                            (DDL_OFF)
+#define DDL_SPI_ENABLE                              (DDL_OFF)
+#define DDL_SRAM_ENABLE                             (DDL_ON)
+#define DDL_SWDT_ENABLE                             (DDL_OFF)
+#define DDL_TIMER0_ENABLE                           (DDL_ON)
+#define DDL_TIMER4_CNT_ENABLE                       (DDL_OFF)
+#define DDL_TIMER4_EMB_ENABLE                       (DDL_OFF)
+#define DDL_TIMER4_OCO_ENABLE                       (DDL_OFF)
+#define DDL_TIMER4_PWM_ENABLE                       (DDL_OFF)
+#define DDL_TIMER4_SEVT_ENABLE                      (DDL_OFF)
+#define DDL_TIMER6_ENABLE                           (DDL_OFF)
+#define DDL_TIMERA_ENABLE                           (DDL_OFF)
+#define DDL_TRNG_ENABLE                             (DDL_OFF)
+#define DDL_USART_ENABLE                            (DDL_ON)
+#define DDL_USBFS_ENABLE                            (DDL_OFF)
+#define DDL_WDT_ENABLE                              (DDL_OFF)
+
+
+/*! Midware module on-off define */
+#define MW_ON                                       (1u)
+#define MW_OFF                                      (0u)
+
+/**
+ *******************************************************************************
+ ** \brief This is the list of Midware modules to use
+ ** Select the modules you need to use to MW_ON.
+ ******************************************************************************/
+#define MW_SD_CARD_ENABLE                           (MW_OFF)
+#define MW_FS_ENABLE                                (MW_OFF)
+#define MW_W25QXX_ENABLE                            (MW_OFF)
+#define MW_WM8731_ENABLE                            (MW_OFF)
+
+/* BSP on-off define */
+#define BSP_ON                                      (1u)
+#define BSP_OFF                                     (0u)
+
+/**
+ * @brief The following is a list of currently supported BSP boards.
+ */
+#define BSP_EV_HC32F460_LQFP100_V1                  (1u)
+#define BSP_EV_HC32F460_LQFP100_V2                  (2u)
+
+/**
+ * @brief The macro BSP_EV_HC32F460 is used to specify the BSP board currently
+ * in use.
+ * The value should be set to one of the list of currently supported BSP boards.
+ * @note  If there is no supported BSP board or the BSP function is not used,
+ * the value needs to be set to BSP_EV_HC32F460.
+ */
+#define BSP_EV_HC32F460                             (BSP_EV_HC32F460)
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global function prototypes (definition in C source)
+ ******************************************************************************/
+
+//@} // DdlConfigGroup
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DDL_CONFIG_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f460/Libraries/CMSIS/Device/HDSC/HC32F460/Include/hc32_common.h

+/*******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ */
+/******************************************************************************/
+/** \file hc32_common.h
+ **
+ ** A detailed description is available at
+ ** @link Hc32CommonGroup Hc32 Series Comm Part description @endlink
+ **
+ **   - 2018-10-18  CDT  First version for Hc32 Series of common part.
+ **
+ ******************************************************************************/
+#ifndef __HC32_COMMON_H__
+#define __HC32_COMMON_H__
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include <string.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ *******************************************************************************
+ ** \defgroup Hc32CommonGroup Hc32 Series Common Part(HC32COMMON)
+ **
+ ******************************************************************************/
+//@{
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+/**
+ *******************************************************************************
+ ** \brief single precision floating point number (4 byte)
+ ******************************************************************************/
+typedef float float32_t;
+
+/**
+ *******************************************************************************
+ ** \brief double precision floating point number (8 byte)
+ ******************************************************************************/
+typedef double float64_t;
+
+/**
+ *******************************************************************************
+ ** \brief function pointer type to void/void function
+ ******************************************************************************/
+typedef void (*func_ptr_t)(void);
+
+/**
+ *******************************************************************************
+ ** \brief function pointer type to void/uint8_t function
+ ******************************************************************************/
+typedef void (*func_ptr_arg1_t)(uint8_t);
+
+/**
+ *******************************************************************************
+ ** \brief functional state
+ ******************************************************************************/
+typedef enum en_functional_state
+{
+    Disable = 0u,
+    Enable  = 1u,
+} en_functional_state_t;
+
+/**
+ *******************************************************************************
+ ** \brief flag status
+ ******************************************************************************/
+typedef enum en_flag_status
+{
+    Reset = 0u,
+    Set   = 1u,
+} en_flag_status_t, en_int_status_t;
+
+/**
+ *******************************************************************************
+ ** \brief generic error codes
+ ******************************************************************************/
+typedef enum en_result
+{
+    Ok                       = 0u,   ///< No error
+    Error                    = 1u,   ///< Non-specific error code
+    ErrorAddressAlignment    = 2u,   ///< Address alignment does not match
+    ErrorAccessRights        = 3u,   ///< Wrong mode (e.g. user/system) mode is set
+    ErrorInvalidParameter    = 4u,   ///< Provided parameter is not valid
+    ErrorOperationInProgress = 5u,   ///< A conflicting or requested operation is still in progress
+    ErrorInvalidMode         = 6u,   ///< Operation not allowed in current mode
+    ErrorUninitialized       = 7u,   ///< Module (or part of it) was not initialized properly
+    ErrorBufferFull          = 8u,   ///< Circular buffer can not be written because the buffer is full
+    ErrorTimeout             = 9u,   ///< Time Out error occurred (e.g. I2C arbitration lost, Flash time-out, etc.)
+    ErrorNotReady            = 10u,  ///< A requested final state is not reached
+    OperationInProgress      = 11u,  ///< Indicator for operation in progress (e.g. ADC conversion not finished, DMA channel used, etc.)
+} en_result_t;
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+
+/**
+ *******************************************************************************
+ ** \brief Device include
+ ******************************************************************************/
+#if defined(HC32F460)
+#include "hc32f460.h"
+#include "system_hc32f460.h"
+#elif defined(HC32xxxx)
+#include "hc32xxxx.h"
+#include "system_hc32xxxx.h"
+#else
+#error "Please select first the target HC32xxxx device used in your application (in hc32xxxx.h file)"
+#endif
+
+/*! Weak and Align compiler definition */
+#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
+  #ifndef __WEAKDEF
+    #define __WEAKDEF                   __attribute__((weak))
+  #endif /* __WEAKDEF */
+  #ifndef __ALIGN_BEGIN
+    #define __ALIGN_BEGIN               __attribute__((aligned (4)))
+  #endif /* __ALIGN_BEGIN */
+  #ifndef __NOINLINE
+    #define __NOINLINE                  __attribute__((noinline))
+  #endif /* __NOINLINE */
+  #ifndef __UNUSED
+    #define __UNUSED                    __attribute__((unused))
+  #endif /* __UNUSED */
+  #ifndef __RAM_FUNC
+    #define __RAM_FUNC                  __attribute__((long_call, section(".ramfunc")))
+    /* Usage: void __RAM_FUNC foo(void) */
+  #endif /* __RAM_FUNC */
+#elif defined (__ICCARM__)                ///< IAR Compiler
+#define __WEAKDEF                       __weak
+#define __ALIGN_BEGIN                   _Pragma("data_alignment=4")
+#define __NOINLINE                      _Pragma("optimize = no_inline")
+#define __UNUSED                        __attribute__((unused))
+#define __RAM_FUNC                      __ramfunc
+#elif defined (__CC_ARM)                ///< ARM Compiler
+#define __WEAKDEF                       __attribute__((weak))
+#define __ALIGN_BEGIN                   __align(4)
+#define __NOINLINE                      __attribute__((noinline))
+#define __UNUSED                        __attribute__((unused))
+/* RAM functions are defined using the toolchain options.
+   Functions that are executed in RAM should reside in a separate source module.
+   Using the 'Options for File' dialog you can simply change the 'Code / Const'
+   area of a module to a memory space in physical RAM. */
+#define __RAM_FUNC
+#else
+#error  "unsupported compiler!!"
+#endif  /* __GNUC__ */
+
+/*! Pointer correspond to zero value */
+#if !defined (NULL)
+#define NULL                            (0)
+#endif
+
+/*! Memory clear */
+#define MEM_ZERO_STRUCT(x)              do {                                   \
+                                        memset((void*)&(x), 0l, (sizeof(x)));  \
+                                        }while(0)
+
+/*! Decimal to BCD */
+#define DEC2BCD(x)                      ((((x) / 10u) << 4u) + ((x) % 10u))
+
+/*! BCD to decimal */
+#define BCD2DEC(x)                      ((((x) >> 4u) * 10u) + ((x) & 0x0Fu))
+
+/*! Returns the minimum value out of two values */
+#define MIN(x, y)                       ((x) < (y) ? (x) : (y))
+
+/*! Returns the maximum value out of two values */
+#define MAX(x, y)                       ((x) > (y) ? (x) : (y))
+
+/*! Returns the dimension of an array */
+#define ARRAY_SZ(X)                     (sizeof((X)) / sizeof((X)[0]))
+
+/*! Check if it is a functional state */
+#define IS_FUNCTIONAL_STATE(state)      (((state) == Disable) || ((state) == Enable))
+
+#define BIT_SET(value,bit)              ((value) |= (bit))
+
+#define BIT_CLEAR(value,bit)            ((value) &= ~(bit))
+
+#define BIT_READ(value,bit)             ((value) & (bit))
+
+#define BIT_VALUE(index)                (1ul << (index))
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+#define SET_REG8_BIT(REG, BIT)          ((REG) |= ((uint8_t)(BIT)))
+#define SET_REG16_BIT(REG, BIT)         ((REG) |= ((uint16_t)(BIT)))
+#define SET_REG32_BIT(REG, BIT)         ((REG) |= ((uint32_t)(BIT)))
+
+#define READ_REG8(REG)                  (REG)
+#define READ_REG16(REG)                 (REG)
+#define READ_REG32(REG)                 (REG)
+
+#define WRITE_REG8(REG, VAL)            ((REG) = ((uint8_t)(VAL)))
+#define WRITE_REG16(REG, VAL)           ((REG) = ((uint16_t)(VAL)))
+#define WRITE_REG32(REG, VAL)           ((REG) = ((uint32_t)(VAL)))
+
+#define MODIFY_REG8(REGS, CLEARMASK, SETMASK)   (WRITE_REG8((REGS), (((READ_REG8((REGS))) & ((uint8_t)(~((uint8_t)(CLEARMASK))))) | ((uint8_t)(SETMASK) & (uint8_t)(CLEARMASK)))))
+#define MODIFY_REG16(REGS, CLEARMASK, SETMASK)  (WRITE_REG16((REGS), (((READ_REG16((REGS))) & ((uint16_t)(~((uint16_t)(CLEARMASK))))) | ((uint16_t)(SETMASK) & (uint16_t)(CLEARMASK)))))
+#define MODIFY_REG32(REGS, CLEARMASK, SETMASK)  (WRITE_REG32((REGS), (((READ_REG32((REGS))) & ((uint32_t)(~((uint32_t)(CLEARMASK))))) | ((uint32_t)(SETMASK) & (uint32_t)(CLEARMASK)))))
+
+/*******************************************************************************
+ * Global function prototypes (definition in C source)
+ ******************************************************************************/
+
+//@} // Hc32CommonGroup
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32_COMMON_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f460/Libraries/CMSIS/Device/HDSC/HC32F460/Include/hc32_ddl.h

+/*******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ */
+/******************************************************************************/
+/** \file hc32_ddl.h
+ **
+ ** A detailed description is available at
+ ** @link Hc32DdlGroup Hc32 Series Ddl description @endlink
+ **
+ **   - 2018-9-28  CDT  First version for Hc32 Series Device Driver
+ **     Library.
+ **
+ ******************************************************************************/
+#ifndef __HC32_DDL_H__
+#define __HC32_DDL_H__
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ *******************************************************************************
+ ** \defgroup Hc32DdlGroup Hc32 Series Device Driver Library(HC32DDL)
+ **
+ ******************************************************************************/
+//@{
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+/*! Defined use device driver library */
+#if !defined (USE_DEVICE_DRIVER_LIB)
+/**
+ *******************************************************************************
+ ** \brief Comment the line below if you will not use the device driver library.
+ ** In this case, the application code will be based on direct access to
+ ** peripherals registers.
+ ******************************************************************************/
+    /* #define USE_DEVICE_DRIVER_LIB */
+#endif /* USE_DEVICE_DRIVER_LIB */
+
+/**
+ *******************************************************************************
+ ** \brief Hc32 Series device driver library version number v1.0.0
+ ******************************************************************************/
+#define HC32_DDL_VERSION_MAIN                       0x01u ///< [31:24] main version
+#define HC32_DDL_VERSION_SUB1                       0x00u ///< [23:16] sub1 version
+#define HC32_DDL_VERSION_SUB2                       0x00u ///< [15:8]  sub2 version
+#define HC32_DDL_VERSION_RC                         0x00u ///< [7:0]   release candidate
+#define HC32_DDL_VERSION                            ((HC32_DDL_VERSION_MAIN << 24) | \
+                                                     (HC32_DDL_VERSION_SUB1 << 16) | \
+                                                     (HC32_DDL_VERSION_SUB2 << 8 ) | \
+                                                     (HC32_DDL_VERSION_RC))
+
+/*! Use device driver library */
+#if defined (USE_DEVICE_DRIVER_LIB)
+/**
+ *******************************************************************************
+ ** \brief Include module's header file
+ ******************************************************************************/
+#if (DDL_ADC_ENABLE == DDL_ON)
+#include "hc32f460_adc.h"
+#endif /* DDL_ADC_ENABLE */
+
+#if (DDL_AES_ENABLE == DDL_ON)
+#include "hc32f460_aes.h"
+#endif /* DDL_AES_ENABLE */
+
+#if (DDL_CAN_ENABLE == DDL_ON)
+#include "hc32f460_can.h"
+#endif /* DDL_CAN_ENABLE */
+
+#if (DDL_CMP_ENABLE == DDL_ON)
+#include "hc32f460_cmp.h"
+#endif /* DDL_CMP_ENABLE */
+
+#if (DDL_CLK_ENABLE == DDL_ON)
+#include "hc32f460_clk.h"
+#endif /* DDL_CLK_ENABLE */
+
+#if (DDL_DCU_ENABLE == DDL_ON)
+#include "hc32f460_dcu.h"
+#endif /* DDL_DCU_ENABLE */
+
+#if (DDL_DMAC_ENABLE == DDL_ON)
+#include "hc32f460_dmac.h"
+#endif /* DDL_DMAC_ENABLE */
+
+#if (DDL_EFM_ENABLE == DDL_ON)
+#include "hc32f460_efm.h"
+#endif /* DDL_EFM_ENABLE */
+
+#if (DDL_EMB_ENABLE == DDL_ON)
+#include "hc32f460_emb.h"
+#endif /* DDL_EMB_ENABLE */
+
+#if (DDL_EXINT_NMI_SWI_ENABLE == DDL_ON)
+#include "hc32f460_exint_nmi_swi.h"
+#endif /* DDL_EXINT_NMI_SWI_ENABLE */
+
+#if (DDL_GPIO_ENABLE == DDL_ON)
+#include "hc32f460_gpio.h"
+#endif /* DDL_GPIO_ENABLE */
+
+#if (DDL_HASH_ENABLE == DDL_ON)
+#include "hc32f460_hash.h"
+#endif /* DDL_HASH_ENABLE */
+
+#if (DDL_I2C_ENABLE == DDL_ON)
+#include "hc32f460_i2c.h"
+#endif /* DDL_I2C_ENABLE */
+
+#if (DDL_I2S_ENABLE == DDL_ON)
+#include "hc32f460_i2s.h"
+#endif /* DDL_I2S_ENABLE */
+
+#if (DDL_ICG_ENABLE == DDL_ON)
+#include "hc32f460_icg.h"
+#endif /* DDL_ICG_ENABLE */
+
+#if (DDL_INTERRUPTS_ENABLE == DDL_ON)
+#include "hc32f460_interrupts.h"
+#endif /* DDL_INTERRUPTS_ENABLE */
+
+#if (DDL_KEYSCAN_ENABLE == DDL_ON)
+#include "hc32f460_keyscan.h"
+#endif /* DDL_KEYSCAN_ENABLE */
+
+#if (DDL_MPU_ENABLE == DDL_ON)
+#include "hc32f460_mpu.h"
+#endif /* DDL_MPU_ENABLE */
+
+#if (DDL_OTS_ENABLE == DDL_ON)
+#include "hc32f460_ots.h"
+#endif /* DDL_OTS_ENABLE */
+
+#if (DDL_PGA_ENABLE == DDL_ON)
+#include "hc32f460_pga.h"
+#endif /* DDL_PGA_ENABLE */
+
+#if (DDL_PWC_ENABLE == DDL_ON)
+#include "hc32f460_pwc.h"
+#endif /* DDL_PWC_ENABLE */
+
+#if (DDL_QSPI_ENABLE == DDL_ON)
+#include "hc32f460_qspi.h"
+#endif /* DDL_QSPI_ENABLE */
+
+#if (DDL_RMU_ENABLE == DDL_ON)
+#include "hc32f460_rmu.h"
+#endif /* DDL_RMU_ENABLE */
+
+#if (DDL_RTC_ENABLE == DDL_ON)
+#include "hc32f460_rtc.h"
+#endif /* DDL_RTC_ENABLE */
+
+#if (DDL_SDIOC_ENABLE == DDL_ON)
+#include "hc32f460_sdioc.h"
+#endif /* DDL_SDIOC_ENABLE */
+
+#if (DDL_SPI_ENABLE == DDL_ON)
+#include "hc32f460_spi.h"
+#endif /* DDL_SPI_ENABLE */
+
+#if (DDL_SRAM_ENABLE == DDL_ON)
+#include "hc32f460_sram.h"
+#endif /* DDL_SRAM_ENABLE */
+
+#if (DDL_SWDT_ENABLE == DDL_ON)
+#include "hc32f460_swdt.h"
+#endif /* DDL_SWDT_ENABLE */
+
+#if (DDL_TIMER0_ENABLE == DDL_ON)
+#include "hc32f460_timer0.h"
+#endif /* DDL_TIMER0_ENABLE */
+
+#if (DDL_TIMER4_CNT_ENABLE == DDL_ON)
+#include "hc32f460_timer4_cnt.h"
+#endif /* DDL_TIMER4_CNT_ENABLE */
+
+#if (DDL_TIMER4_EMB_ENABLE == DDL_ON)
+#include "hc32f460_timer4_emb.h"
+#endif /* DDL_TIMER4_EMB_ENABLE */
+
+#if (DDL_TIMER4_OCO_ENABLE == DDL_ON)
+#include "hc32f460_timer4_oco.h"
+#endif /* DDL_TIMER4_OCO_ENABLE */
+
+#if (DDL_TIMER4_PWM_ENABLE == DDL_ON)
+#include "hc32f460_timer4_pwm.h"
+#endif /* DDL_TIMER4_PWM_ENABLE */
+
+#if (DDL_TIMER4_SEVT_ENABLE == DDL_ON)
+#include "hc32f460_timer4_sevt.h"
+#endif /* DDL_TIMER4_SEVT_ENABLE */
+
+#if (DDL_TIMER6_ENABLE == DDL_ON)
+#include "hc32f460_timer6.h"
+#endif /* DDL_TIMER6_ENABLE */
+
+#if (DDL_TIMERA_ENABLE == DDL_ON)
+#include "hc32f460_timera.h"
+#endif /* DDL_TIMERA_ENABLE */
+
+#if (DDL_TRNG_ENABLE == DDL_ON)
+#include "hc32f460_trng.h"
+#endif /* DDL_TRNG_ENABLE */
+
+#if (DDL_USART_ENABLE == DDL_ON)
+#include "hc32f460_usart.h"
+#endif /* DDL_USART_ENABLE */
+
+#if (DDL_USBFS_ENABLE == DDL_ON)
+#include "hc32f460_usbfs.h"
+#endif /* DDL_USBFS_ENABLE */
+
+#if (DDL_UTILITY_ENABLE == DDL_ON)
+#include "hc32f460_utility.h"
+#endif /* DDL_UTILITY_ENABLE */
+
+#if (DDL_WDT_ENABLE == DDL_ON)
+#include "hc32f460_wdt.h"
+#endif /* DDL_WDT_ENABLE */
+
+#endif /* USE_DEVICE_DRIVER_LIB */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global function prototypes (definition in C source)
+ ******************************************************************************/
+
+//@} // Hc32DdlGroup
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32_DDL_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f460/Libraries/CMSIS/Device/HDSC/HC32F460/Include/system_hc32f460.h

+/*******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ */
+/******************************************************************************/
+/** \file system_hc32f460.h
+ **
+ ** A detailed description is available at
+ ** @link Hc32f460SystemGroup Hc32f460System description @endlink
+ **
+ **   - 2018-10-15  CDT  First version.
+ **
+ ******************************************************************************/
+#ifndef __SYSTEM_HC32F460_H__
+#define __SYSTEM_HC32F460_H__
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include <stdint.h>
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *******************************************************************************
+ ** \defgroup Hc32f460SystemGroup HC32F460 System Configure
+ **
+ ******************************************************************************/
+//@{
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('define')
+ ******************************************************************************/
+
+/**
+ ******************************************************************************
+ ** \brief Clock Setup macro definition
+ **
+ ** - 0: CLOCK_SETTING_NONE  - User provides own clock setting in application
+ ** - 1: CLOCK_SETTING_CMSIS -
+ ******************************************************************************/
+#define CLOCK_SETTING_NONE  0u
+#define CLOCK_SETTING_CMSIS 1u
+
+#define HRC_FREQ_MON()                  (*((volatile unsigned int*)(0x40010684UL)))
+
+#if !defined (HRC_16MHz_VALUE)
+    #define HRC_16MHz_VALUE             ((uint32_t)16000000UL)  /*!< Internal high speed RC freq.(16MHz) */
+#endif
+
+#if !defined (HRC_20MHz_VALUE)
+    #define HRC_20MHz_VALUE             ((uint32_t)20000000UL)  /*!< Internal high speed RC freq.(20MHz) */
+#endif
+
+#if !defined (MRC_VALUE)
+#define MRC_VALUE ((uint32_t)8000000)   /*!< Internal middle speed RC freq. */
+#endif
+
+#if !defined (LRC_VALUE)
+#define LRC_VALUE ((uint32_t)32768)     /*!< Internal low speed RC freq. */
+#endif
+
+#if !defined (XTAL_VALUE)
+#define XTAL_VALUE ((uint32_t)8000000)  /*!< External high speed OSC freq. */
+#endif
+
+#if !defined (XTAL32_VALUE)
+#define XTAL32_VALUE ((uint32_t)32768)  /*!< External low speed OSC freq. */
+#endif
+
+/******************************************************************************/
+/*                                                                            */
+/*                      START OF USER SETTINGS HERE                           */
+/*                      ===========================                           */
+/*                                                                            */
+/*                 All lines with '<<<' can be set by user.                   */
+/*                                                                            */
+/******************************************************************************/
+
+/******************************************************************************/
+/* Global function prototypes ('extern', definition in C source)              */
+/******************************************************************************/
+extern uint32_t HRC_VALUE;                // HRC Clock Frequency (Core Clock)
+extern uint32_t SystemCoreClock;          // System Clock Frequency (Core Clock)
+extern void SystemInit(void);             // Initialize the system
+extern void SystemCoreClockUpdate(void);  // Update SystemCoreClock variable
+
+//@} // Hc32f460SystemGroup
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_HC32F460_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f460/Libraries/CMSIS/Device/HDSC/HC32F460/Source/system_hc32f460.c

+/*******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ */
+/******************************************************************************/
+/** \file system_hc32f460.c
+ **
+ ** A detailed description is available at
+ ** @link Hc32f460SystemGroup Hc32f460System description @endlink
+ **
+ **   - 2018-10-15 CDT First version
+ **
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+/**
+ *******************************************************************************
+ ** \addtogroup Hc32f460SystemGroup
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('define')
+ ******************************************************************************/
+
+//@{
+
+/**
+ ******************************************************************************
+ ** System Clock Frequency (Core Clock) Variable according CMSIS
+ ******************************************************************************/
+uint32_t HRC_VALUE = HRC_16MHz_VALUE;
+uint32_t SystemCoreClock = MRC_VALUE;
+
+/**
+ ******************************************************************************
+ ** \brief  Setup the microcontroller system. Initialize the System and update
+ ** the SystemCoreClock variable.
+ **
+ ** \param  None
+ ** \return None
+ ******************************************************************************/
+void SystemInit(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 20) | (3UL << 22)); /* set CP10 and CP11 Full Access */
+#endif
+    SystemCoreClockUpdate();
+}
+
+void SystemCoreClockUpdate(void)  // Update SystemCoreClock variable
+{
+    uint8_t tmp = 0u;
+    uint32_t plln = 19u, pllp = 1u, pllm = 0u, pllsource = 0u;
+
+    /* Select proper HRC_VALUE according to ICG1.HRCFREQSEL bit */
+    /* ICG1.HRCFREQSEL = '0' represent HRC_VALUE = 20000000UL   */
+    /* ICG1.HRCFREQSEL = '1' represent HRC_VALUE = 16000000UL   */
+    if (1UL == (HRC_FREQ_MON() & 1UL))
+    {
+        HRC_VALUE = HRC_16MHz_VALUE;
+    }
+    else
+    {
+        HRC_VALUE = HRC_20MHz_VALUE;
+    }
+
+    tmp = M4_SYSREG->CMU_CKSWR_f.CKSW;
+    switch (tmp)
+    {
+        case 0x00:  /* use internal high speed RC */
+            SystemCoreClock = HRC_VALUE;
+            break;
+        case 0x01:  /* use internal middle speed RC */
+            SystemCoreClock = MRC_VALUE;
+            break;
+        case 0x02:  /* use internal low speed RC */
+            SystemCoreClock = LRC_VALUE;
+            break;
+        case 0x03:  /* use external high speed OSC */
+            SystemCoreClock = XTAL_VALUE;
+            break;
+        case 0x04:  /* use external low speed OSC */
+            SystemCoreClock = XTAL32_VALUE;
+            break;
+        case 0x05:  /* use MPLL */
+            /* PLLCLK = ((pllsrc / pllm) * plln) / pllp */
+            pllsource = M4_SYSREG->CMU_PLLCFGR_f.PLLSRC;
+            plln = M4_SYSREG->CMU_PLLCFGR_f.MPLLN;
+            pllp = M4_SYSREG->CMU_PLLCFGR_f.MPLLP;
+            pllm = M4_SYSREG->CMU_PLLCFGR_f.MPLLM;
+            /* use exteranl high speed OSC as PLL source */
+            if (0ul == pllsource)
+            {
+                SystemCoreClock = (XTAL_VALUE) / (pllm + 1ul) * (plln + 1ul) / (pllp + 1ul);
+                                        }
+            /* use interanl high RC as PLL source */
+            else if (1ul == pllsource)
+            {
+                SystemCoreClock = (HRC_VALUE) / (pllm + 1ul) * (plln + 1ul) / (pllp + 1ul);
+            }
+            else
+            {
+                /* Reserved */
+            }
+            break;
+    }
+}
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f460/Libraries/CMSIS/Include/cmsis_compiler.h

+/**************************************************************************//**
+ * @file     cmsis_compiler.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V5.1.0
+ * @date     09. October 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include <stdint.h>
+
+/*
+ * Arm Compiler 4/5
+ */
+#if   defined ( __CC_ARM )
+  #include "cmsis_armcc.h"
+
+
+/*
+ * Arm Compiler 6.6 LTM (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+  #include "cmsis_armclang_ltm.h"
+
+  /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
+  #include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+  #include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+  #include <cmsis_iccarm.h>
+
+
+/*
+ * TI Arm Compiler
+ */
+#elif defined ( __TI_ARM__ )
+  #include <cmsis_ccs.h>
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __attribute__((packed))
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)                           __attribute__((aligned(x)))
+  #endif
+  #ifndef   __RESTRICT
+    #define __RESTRICT                             __restrict
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+  /*
+   * The CMSIS functions have been implemented as intrinsics in the compiler.
+   * Please use "carm -?i" to get an up to date list of all intrinsics,
+   * Including the CMSIS ones.
+   */
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __packed__
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __packed__
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __packed__
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __packed__ T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)              __align(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+   #include <cmsis_csm.h>
+
+ #ifndef   __ASM
+    #define __ASM                                  _asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    // NO RETURN is automatically detected hence no warning here
+    #define __NO_RETURN
+  #endif
+  #ifndef   __USED
+    #warning No compiler specific solution for __USED. __USED is ignored.
+    #define __USED
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __weak
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               @packed
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        @packed struct
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         @packed union
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    @packed struct T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+    #define __ALIGNED(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+#else
+  #error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+

bsp/hc32f460/Libraries/CMSIS/Include/cmsis_version.h

+/**************************************************************************//**
+ * @file     cmsis_version.h
+ * @brief    CMSIS Core(M) Version definitions
+ * @version  V5.0.3
+ * @date     24. June 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/*  CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#endif

bsp/hc32f460/Libraries/CMSIS/Include/tz_context.h

+/******************************************************************************
+ * @file     tz_context.h
+ * @brief    Context Management for Armv8-M TrustZone
+ * @version  V1.0.1
+ * @date     10. January 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef TZ_CONTEXT_H
+#define TZ_CONTEXT_H
+
+#include <stdint.h>
+
+#ifndef TZ_MODULEID_T
+#define TZ_MODULEID_T
+/// \details Data type that identifies secure software modules called by a process.
+typedef uint32_t TZ_ModuleId_t;
+#endif
+
+/// \details TZ Memory ID identifies an allocated memory slot.
+typedef uint32_t TZ_MemoryId_t;
+
+/// Initialize secure context memory system
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_InitContextSystem_S (void);
+
+/// Allocate context memory for calling secure software modules in TrustZone
+/// \param[in]  module   identifies software modules called from non-secure mode
+/// \return value != 0 id TrustZone memory slot identifier
+/// \return value 0    no memory available or internal error
+TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
+
+/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
+
+/// Load secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
+
+/// Store secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
+
+#endif  // TZ_CONTEXT_H