1. 04 12月, 2014 1 次提交
  2. 10 7月, 2014 1 次提交
  3. 04 10月, 2013 1 次提交
  4. 26 9月, 2013 1 次提交
  5. 24 7月, 2013 1 次提交
    • M
      Intel xhci: refactor EHCI/xHCI port switching · 26b76798
      Mathias Nyman 提交于
      Make the Linux xHCI driver automatically try to switchover the EHCI ports to
      xHCI when an Intel xHCI host is detected, and it also finds an Intel EHCI host.
      
      This means we will no longer have to add Intel xHCI hosts to a quirks list when
      the PCI device IDs change.  Simply continuing to add new Intel xHCI PCI device
      IDs to the quirks list is not sustainable.
      
      During suspend ports may be swicthed back to EHCI by BIOS and not properly
      restored to xHCI at resume. Previously both EHCI and xHCI resume functions
      switched ports back to XHCI, but it's enough to do it in xHCI only
      because the hub driver doesn't start running again until after both hosts are resumed.
      Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      26b76798
  6. 24 4月, 2013 1 次提交
  7. 29 3月, 2013 1 次提交
    • A
      USB: remove CONFIG_USB_SUSPEND option · 84ebc102
      Alan Stern 提交于
      This patch (as1675) removes the CONFIG_USB_SUSPEND option, essentially
      replacing it everywhere with CONFIG_PM_RUNTIME (except for one place
      in hub.c, where it is replaced with CONFIG_PM because the code needs
      to be used in both runtime and system PM).  The net result is code
      shrinkage and simplification.
      
      There's very little point in keeping CONFIG_USB_SUSPEND because almost
      everybody enables it.  The few that don't will find that the usbcore
      module has gotten somewhat bigger and they will have to take active
      measures if they want to prevent hubs from being runtime suspended.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      CC: Peter Chen <peter.chen@freescale.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      84ebc102
  8. 08 1月, 2013 1 次提交
  9. 29 11月, 2012 1 次提交
  10. 12 11月, 2012 1 次提交
  11. 01 11月, 2012 3 次提交
    • A
      USB: EHCI: make ehci-pci a separate driver · adfa79d1
      Alan Stern 提交于
      This patch (as1625) splits the PCI portion of ehci-hcd out into its
      own separate driver module, called ehci-pci.  Consistently with the
      current practice, the decision whether to build this module is not
      user-configurable.  If EHCI and PCI are enabled then the module will
      be built, always.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      CC: Felipe Balbi <balbi@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      adfa79d1
    • A
      USB: EHCI: remove ehci_port_power() routine · c73cee71
      Alan Stern 提交于
      This patch (as1623) removes the ehci_port_power() routine and all the
      places that call it.  There's no reason for ehci-hcd to change the
      port power settings; the hub driver takes care of all that stuff.
      
      There is one exception: When the controller is resumed from
      hibernation or following a loss of power, the ports that are supposed
      to be handed over to a companion controller must be powered on first.
      Otherwise the handover won't work.  This process is not visible to the
      hub driver, so it has to be handled in ehci-hcd.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c73cee71
    • A
      USB: EHCI: remove unused Link Power Management code · 4968f951
      Alan Stern 提交于
      This patch (as1622) removes the USB-2.1 Link Power Management code
      from the ehci-hcd driver.  This code was never integrated with
      usbcore, it is full of bugs, and it was not getting used by anybody.
      
      However, the debugging code for dumping the LPM-related fields in the
      EHCI registers is left in place.  In theory it might be useful to see
      these values, even though we don't use them.
      
      This essentially amounts to a partial revert of commit
      aa4d8342 (USB: EHCI: EHCI 1.1
      addendum: preparation) and an almost full revert of commit
      48f24970 (USB: EHCI: EHCI 1.1
      addendum: Basic LPM feature support) plus its follow-ons.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      4968f951
  12. 25 10月, 2012 1 次提交
  13. 22 10月, 2012 1 次提交
    • A
      EHCI: use the isochronous scheduling threshold · 98cae42d
      Alan Stern 提交于
      This patch (as1609) changes the way ehci-hcd uses the "Isochronous
      Scheduling Threshold" in its calculations.  Until now the code has
      ignored the threshold except for certain Intel PCI-based controllers.
      This violates the EHCI spec.
      
      The new code takes the threshold into account always, removing the
      need for the fs_i_thresh quirk flag.  In addition it implements the
      "full frame cache" setting more efficiently, moving forward only as
      far as the next frame boundary instead of always moving forward 8
      microframes.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      98cae42d
  14. 17 7月, 2012 1 次提交
    • A
      USB: EHCI: use hrtimer for the periodic schedule · 3ca9aeba
      Alan Stern 提交于
      This patch (as1573) adds hrtimer support for managing ehci-hcd's
      periodic schedule.  There are two issues to deal with.
      
      First, the schedule's state (on or off) must not be changed until the
      hardware status has caught up with the current command.  This is
      handled by an hrtimer event that polls at 1-ms intervals to see when
      the Periodic Schedule Status (PSS) flag matches the Periodic Schedule
      Enable (PSE) value.
      
      Second, the schedule should not be turned off as soon as it becomes
      empty.  Turning the schedule on and off takes time, so we want to wait
      until the schedule has been empty for a suitable period before turning
      it off.  This is handled by an hrtimer event that gets set to expire
      10 ms after the periodic schedule becomes empty.
      
      The existing code polls (for up to 1125 us and with interrupts
      disabled!) to check the status, and doesn't implement a delay before
      turning off the schedule.  Furthermore, if the polling fails then the
      driver decides that the controller has died.  This has caused problems
      for several people; some controllers can take 10 ms or more to turn
      off their periodic schedules.
      
      This patch fixes these issues.  It also makes the "broken_periodic"
      workaround unnecessary; there is no longer any danger of turning off
      the periodic schedule after it has been on for less than 1 ms.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      3ca9aeba
  15. 10 7月, 2012 1 次提交
    • A
      EHCI: centralize controller initialization · 1a49e2ac
      Alan Stern 提交于
      This patch (as1564c) converts the EHCI platform drivers to use the
      central ehci_setup() routine for generic controller initialization
      rather than each having its own idiosyncratic approach.
      
      The major point of difficulty lies in ehci-pci's many vendor- and
      device-specific workarounds.  Some of them have to be applied before
      calling ehci_setup() and some after, which necessitates a fair amount
      of code motion.  The other platform drivers require much smaller
      changes.
      
      One point not addressed by the patch is whether ports should be
      powered on or off following initialization.  The different drivers
      appear to handle this pretty much at random.  In fact it shouldn't
      matter, because the hub driver turns on power to all ports when it
      binds to the root hub.  Straightening that out will be left for
      another day.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      1a49e2ac
  16. 09 7月, 2012 1 次提交
    • A
      EHCI: centralize controller suspend/resume · c5cf9212
      Alan Stern 提交于
      This patch (as1563) removes a lot of duplicated code by moving the
      EHCI controller suspend/resume routines into the core driver, where
      the various platform drivers can invoke them as needed.
      
      Not only does this simplify these platform drivers, this also makes it
      easier for other platform drivers to add suspend/resume support in the
      future.
      
      Note: The patch does not touch the ehci-fsl.c file, because its
      approach to suspend and resume is so different from all the others.
      It will have to be handled specially by its maintainer.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c5cf9212
  17. 14 6月, 2012 1 次提交
    • A
      USB: add NO_D3_DURING_SLEEP flag and revert 151b6128 · c2fb8a3f
      Alan Stern 提交于
      This patch (as1558) fixes a problem affecting several ASUS computers:
      The machine crashes or corrupts memory when going into suspend if the
      ehci-hcd driver is bound to any controllers.  Users have been forced
      to unbind or unload ehci-hcd before putting their systems to sleep.
      
      After extensive testing, it was determined that the machines don't
      like going into suspend when any EHCI controllers are in the PCI D3
      power state.  Presumably this is a firmware bug, but there's nothing
      we can do about it except to avoid putting the controllers in D3
      during system sleep.
      
      The patch adds a new flag to indicate whether the problem is present,
      and avoids changing the controller's power state if the flag is set.
      Runtime suspend is unaffected; this matters only for system suspend.
      However as a side effect, the controller will not respond to remote
      wakeup requests while the system is asleep.  Hence USB wakeup is not
      functional -- but of course, this is already true in the current state
      of affairs.
      
      A similar patch has already been applied as commit
      151b6128 (USB: EHCI: fix crash during
      suspend on ASUS computers).  The patch supersedes that one and reverts
      it.  There are two differences:
      
      	The old patch added the flag at the USB level; this patch
      	adds it at the PCI level.
      
      	The old patch applied to all chipsets with the same vendor,
      	subsystem vendor, and product IDs; this patch makes an
      	exception for a known-good system (based on DMI information).
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Tested-by: NDâniel Fraga <fragabr@gmail.com>
      Tested-by: NAndrey Rahmatullin <wrar@wrar.name>
      Tested-by: NSteven Rostedt <rostedt@goodmis.org>
      Cc: stable <stable@vger.kernel.org>
      Reviewed-by: NRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c2fb8a3f
  18. 21 5月, 2012 1 次提交
  19. 15 5月, 2012 1 次提交
  20. 04 5月, 2012 1 次提交
    • S
      xhci: Add Lynx Point to list of Intel switchable hosts. · 1c12443a
      Sarah Sharp 提交于
      The upcoming Intel Lynx Point chipset includes an xHCI host controller
      that can have ports switched from the EHCI host controller, just like
      the Intel Panther Point xHCI host.  This time, ports from both EHCI
      hosts can be switched to the xHCI host controller.  The PCI config
      registers to do the port switching are in the exact same place in the
      xHCI PCI configuration registers, with the same semantics.
      
      Hooray for shipping patches for next-gen hardware before the current gen
      hardware is even available for purchase!
      
      This patch should be backported to stable kernels as old as 3.0,
      that contain commit 69e848c2
      "Intel xhci: Support EHCI/xHCI port switching."
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Cc: stable@vger.kernel.org
      1c12443a
  21. 25 4月, 2012 1 次提交
    • A
      USB: EHCI: fix crash during suspend on ASUS computers · 151b6128
      Alan Stern 提交于
      This patch (as1545) fixes a problem affecting several ASUS computers:
      The machine crashes or corrupts memory when going into suspend if the
      ehci-hcd driver is bound to any controllers.  Users have been forced
      to unbind or unload ehci-hcd before putting their systems to sleep.
      
      After extensive testing, it was determined that the machines don't
      like going into suspend when any EHCI controllers are in the PCI D3
      power state.  Presumably this is a firmware bug, but there's nothing
      we can do about it except to avoid putting the controllers in D3
      during system sleep.
      
      The patch adds a new flag to indicate whether the problem is present,
      and avoids changing the controller's power state if the flag is set.
      Runtime suspend is unaffected; this matters only for system suspend.
      However as a side effect, the controller will not respond to remote
      wakeup requests while the system is asleep.  Hence USB wakeup is not
      functional -- but of course, this is already true in the current state
      of affairs.
      
      This fixes Bugzilla #42728.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Tested-by: NSteven Rostedt <rostedt@goodmis.org>
      Tested-by: NAndrey Rahmatullin <wrar@wrar.name>
      Tested-by: NOleksij Rempel (fishor) <bug-track@fisher-privat.net>
      Cc: stable <stable@vger.kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      151b6128
  22. 25 1月, 2012 1 次提交
  23. 19 10月, 2011 1 次提交
    • A
      EHCI: workaround for MosChip controller bug · 68aa95d5
      Alan Stern 提交于
      This patch (as1489) works around a hardware bug in MosChip EHCI
      controllers.  Evidently when one of these controllers increments the
      frame-index register, it changes the three low-order bits (the
      microframe counter) before changing the higher order bits (the frame
      counter).  If the register is read at just the wrong time, the value
      obtained is too low by 8.
      
      When the appropriate quirk flag is set, we work around this problem by
      reading the frame-index register a second time if the first value's
      three low-order bits are all 0.  This gives the hardware a chance to
      finish updating the register, yielding the correct value.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Tested-by: NJason N Pitt <jpitt@fhcrc.org>
      CC: stable <stable@vger.kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      68aa95d5
  24. 23 8月, 2011 1 次提交
    • A
      USB: EHCI: remove usages of hcd->state · e8799906
      Alan Stern 提交于
      This patch (as1483) improves the ehci-hcd driver family by getting rid
      of the reliance on the hcd->state variable.  It has no clear owner and
      it isn't protected by the usual HCD locks.  In its place, the patch
      adds a new, private ehci->rh_state field to record the state of the
      root hub.
      
      Along the way, the patch removes a couple of lines containing
      redundant assignments to the state variable.  Also, the QUIESCING
      state simply gets changed to the RUNNING state, because the driver
      doesn't make any distinction between them.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Acked-by: NJingoo Han <jg1.han@samsung.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e8799906
  25. 28 5月, 2011 1 次提交
    • S
      Intel xhci: Support EHCI/xHCI port switching. · 69e848c2
      Sarah Sharp 提交于
      The Intel Panther Point chipsets contain an EHCI and xHCI host controller
      that shares some number of skew-dependent ports.  These ports can be
      switched from the EHCI to the xHCI host (and vice versa) by a hardware MUX
      that is controlled by registers in the xHCI PCI configuration space.  The
      USB 3.0 SuperSpeed terminations on the xHCI ports can be controlled
      separately from the USB 2.0 data wires.
      
      This switchover mechanism is there to support users who do a custom
      install of certain non-Linux operating systems that don't have official
      USB 3.0 support.  By default, the ports are under EHCI, SuperSpeed
      terminations are off, and USB 3.0 devices will show up under the EHCI
      controller at reduced speeds.  (This was more palatable for the marketing
      folks than having completely dead USB 3.0 ports if no xHCI drivers are
      available.)  Users should be able to turn on xHCI by default through a
      BIOS option, but users are happiest when they don't have to change random
      BIOS settings.
      
      This patch introduces a driver method to switchover the ports from EHCI to
      xHCI before the EHCI driver finishes PCI enumeration.  We want to switch
      the ports over before the USB core has the chance to enumerate devices
      under EHCI, or boot from USB mass storage will fail if the boot device
      connects under EHCI first, and then gets disconnected when the port
      switches over to xHCI.
      
      Add code to the xHCI PCI quirk to switch the ports from EHCI to xHCI.  The
      PCI quirks code will run before any other PCI probe function is called, so
      this avoids the issue with boot devices.
      
      Another issue is with BIOS behavior during system resume from hibernate.
      If the BIOS doesn't support xHCI, it may switch the devices under EHCI to
      allow use of the USB keyboard, mice, and mass storage devices.  It's
      supposed to remember the value of the port routing registers and switch
      them back when the OS attempts to take control of the xHCI host controller,
      but we all know not to trust BIOS writers.
      
      Make both the xHCI driver and the EHCI driver attempt to switchover the
      ports in their PCI resume functions.  We can't guarantee which PCI device
      will be resumed first, so this avoids any race conditions.  Writing a '1'
      to an already set port switchover bit or a '0' to a cleared port switchover
      bit should have no effect.
      
      The xHCI PCI configuration registers will be documented in the EDS-level
      chipset spec, which is not public yet.  I have permission from legal and
      the Intel chipset group to release this patch early to allow good Linux
      support at product launch.  I've tried to document the registers as much
      as possible, so please let me know if anything is unclear.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      69e848c2
  26. 04 5月, 2011 1 次提交
  27. 02 3月, 2011 1 次提交
    • A
      USB host: Move AMD PLL quirk to pci-quirks.c · ad93562b
      Andiry Xu 提交于
      This patch moves the AMD PLL quirk code in OHCI/EHCI driver to pci-quirks.c,
      and exports the functions to be used by xHCI driver later.
      
      AMD PLL quirk disable the optional PM feature inside specific
      SB700/SB800/Hudson-2/3 platforms under the following conditions:
      
      1. If an isochronous device is connected to OHCI/EHCI/xHCI port and is active;
      2. Optional PM feature that powers down the internal Bus PLL when the link is
         in low power state is enabled.
      
      Without AMD PLL quirk, USB isochronous stream may stutter or have breaks
      occasionally, which greatly impair the performance of audio/video streams.
      
      Currently AMD PLL quirk is implemented in OHCI and EHCI driver, and will be
      added to xHCI driver too. They are doing similar things actually, so move
      the quirk code to pci-quirks.c, which has several advantages:
      
      1. Remove duplicate defines and functions in OHCI/EHCI (and xHCI) driver and
         make them cleaner;
      2. AMD chipset information will be probed only once and then stored.
         Currently they're probed during every OHCI/EHCI initialization, move
         the detect code to pci-quirks.c saves the repeat detect cost;
      3. Build up synchronization among OHCI/EHCI/xHCI driver. In current
         code, every host controller enable/disable PLL only according to
         its own status, and may enable PLL while there is still isoc transfer on
         other HCs. Move the quirk to pci-quirks.c prevents this issue.
      Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
      Cc: David Brownell <dbrownell@users.sourceforge.net>
      Cc: Alex He <alex.he@amd.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ad93562b
  28. 18 2月, 2011 1 次提交
  29. 05 2月, 2011 1 次提交
    • A
      USB host: Move AMD PLL quirk to pci-quirks.c · b7d5b439
      Andiry Xu 提交于
      This patch moves the AMD PLL quirk code in OHCI/EHCI driver to pci-quirks.c,
      and exports the functions to be used by xHCI driver later.
      
      AMD PLL quirk disable the optional PM feature inside specific
      SB700/SB800/Hudson-2/3 platforms under the following conditions:
      
      1. If an isochronous device is connected to OHCI/EHCI/xHCI port and is active;
      2. Optional PM feature that powers down the internal Bus PLL when the link is
         in low power state is enabled.
      
      Without AMD PLL quirk, USB isochronous stream may stutter or have breaks
      occasionally, which greatly impair the performance of audio/video streams.
      
      Currently AMD PLL quirk is implemented in OHCI and EHCI driver, and will be
      added to xHCI driver too. They are doing similar things actually, so move
      the quirk code to pci-quirks.c, which has several advantages:
      
      1. Remove duplicate defines and functions in OHCI/EHCI (and xHCI) driver and
         make them cleaner;
      2. AMD chipset information will be probed only once and then stored.
         Currently they're probed during every OHCI/EHCI initialization, move
         the detect code to pci-quirks.c saves the repeat detect cost;
      3. Build up synchronization among OHCI/EHCI/xHCI driver. In current
         code, every host controller enable/disable PLL only according to
         its own status, and may enable PLL while there is still isoc transfer on
         other HCs. Move the quirk to pci-quirks.c prevents this issue.
      Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
      Cc: David Brownell <dbrownell@users.sourceforge.net>
      Cc: Alex He <alex.he@amd.com>
      Acked-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b7d5b439
  30. 04 2月, 2011 1 次提交
    • Y
      USB: EHCI: fix scheduling while atomic during suspend · 148fc55f
      Yin Kangkai 提交于
      There is a msleep with spin lock held during ehci pci suspend, which will
      cause kernel BUG: scheduling while atomic. Fix that.
      
      [  184.139620] BUG: scheduling while atomic: kworker/u:11/416/0x00000002
      [  184.139632] 4 locks held by kworker/u:11/416:
      [  184.139640]  #0:  (events_unbound){+.+.+.}, at: [<c104ddd4>] process_one_work+0x1b3/0x4cb
      [  184.139669]  #1:  ((&entry->work)){+.+.+.}, at: [<c104ddd4>] process_one_work+0x1b3/0x4cb
      [  184.139686]  #2:  (&__lockdep_no_validate__){+.+.+.}, at: [<c127cde3>] __device_suspend+0x2c/0x154
      [  184.139706]  #3:  (&(&ehci->lock)->rlock){-.-...}, at: [<c132f3d8>] ehci_pci_suspend+0x35/0x7b
      [  184.139725] Modules linked in: serio_raw pegasus joydev mrst_gfx(C) battery
      [  184.139748] irq event stamp: 52
      [  184.139753] hardirqs last  enabled at (51): [<c14fdaac>] mutex_lock_nested+0x258/0x293
      [  184.139766] hardirqs last disabled at (52): [<c14fe7b4>] _raw_spin_lock_irqsave+0xf/0x3e
      [  184.139777] softirqs last  enabled at (0): [<c10371c1>] copy_process+0x3d2/0x109d
      [  184.139789] softirqs last disabled at (0): [<  (null)>]   (null)
      [  184.139802] Pid: 416, comm: kworker/u:11 Tainted: G         C  2.6.37-6.3-adaptation-oaktrail #37
      [  184.139809] Call Trace:
      [  184.139820]  [<c102eeff>] __schedule_bug+0x5e/0x65
      [  184.139829]  [<c14fbca5>] schedule+0xac/0xc4c
      [  184.139840]  [<c11d4845>] ? string+0x37/0x8b
      [  184.139853]  [<c1044f21>] ? lock_timer_base+0x1f/0x3e
      [  184.139863]  [<c14fe7da>] ? _raw_spin_lock_irqsave+0x35/0x3e
      [  184.139876]  [<c1061590>] ? trace_hardirqs_off+0xb/0xd
      [  184.139885]  [<c14fccdc>] schedule_timeout+0x283/0x2d9
      [  184.139896]  [<c104516f>] ? process_timeout+0x0/0xa
      [  184.139906]  [<c14fcd47>] schedule_timeout_uninterruptible+0x15/0x17
      [  184.139916]  [<c104566a>] msleep+0x10/0x16
      [  184.139926]  [<c132f316>] ehci_adjust_port_wakeup_flags+0x69/0xf6
      [  184.139937]  [<c132f3eb>] ehci_pci_suspend+0x48/0x7b
      [  184.139946]  [<c1326587>] suspend_common+0x52/0xbb
      [  184.139956]  [<c1326625>] hcd_pci_suspend+0x26/0x28
      [  184.139967]  [<c11e7182>] pci_pm_suspend+0x5f/0xd0
      [  184.139976]  [<c127ca3a>] pm_op+0x5d/0xf0
      [  184.139986]  [<c127ceac>] __device_suspend+0xf5/0x154
      [  184.139996]  [<c127d2c8>] async_suspend+0x16/0x3a
      [  184.140006]  [<c1058f54>] async_run_entry_fn+0x89/0x111
      [  184.140016]  [<c104deb6>] process_one_work+0x295/0x4cb
      [  184.140026]  [<c1058ecb>] ? async_run_entry_fn+0x0/0x111
      [  184.140036]  [<c104e3d0>] worker_thread+0x17f/0x298
      [  184.140045]  [<c104e251>] ? worker_thread+0x0/0x298
      [  184.140055]  [<c105277f>] kthread+0x64/0x69
      [  184.140064]  [<c105271b>] ? kthread+0x0/0x69
      [  184.140075]  [<c1002efa>] kernel_thread_helper+0x6/0x1a
      Signed-off-by: NYin Kangkai <kangkai.yin@intel.com>
      Acked-by: NAlan Stern <stern@rowland.harvard.edu>
      CC: David Brownell <dbrownell@users.sourceforge.net>
      CC: stable@kernel.org
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      148fc55f
  31. 23 1月, 2011 1 次提交
  32. 11 12月, 2010 1 次提交
    • A
      USB: EHCI: ASPM quirk of ISOC on AMD SB800 · 05570297
      Alex He 提交于
      When ASPM PM Feature is enabled on UMI link, devices that use ISOC stream of
      data transfer may be exposed to longer latency causing less than optimal per-
      formance of the device. The longer latencies are normal and are due to link
      wake time coming out of low power state which happens frequently to save
      power when the link is not active.
      The following code will make exception for certain features of ASPM to be by
      passed and keep the logic normal state only when the ISOC device is connected
      and active. This change will allow the device to run at optimal performance
      yet minimize the impact on overall power savings.
      Signed-off-by: NAlex He <alex.he@amd.com>
      Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Cc: stable <stable@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      05570297
  33. 01 12月, 2010 1 次提交
  34. 18 11月, 2010 1 次提交
  35. 17 11月, 2010 1 次提交
    • A
      USB: EHCI: AMD periodic frame list table quirk · 3d091a6f
      Andiry Xu 提交于
      On AMD SB700/SB800/Hudson-2/3 platforms, USB EHCI controller may read/write
      to memory space not allocated to USB controller if there is longer than
      normal latency on DMA read encountered. In this condition the exposure will
      be encountered only if the driver has following format of Periodic Frame
      List link pointer structure:
      
      For any idle periodic schedule, the Frame List link pointers that have the
      T-bit set to 1 intending to terminate the use of frame list link pointer
      as a physical memory pointer.
      
      Idle periodic schedule Frame List Link pointer shoule be in the following
      format to avoid the issue:
      
      Frame list link pointer should be always contains a valid pointer to a
      inactive QHead with T-bit set to 0.
      Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
      Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3d091a6f
  36. 21 9月, 2010 1 次提交
  37. 11 8月, 2010 2 次提交