- 23 6月, 2008 12 次提交
-
-
由 Stanislav Samsonov 提交于
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: NStanislav Samsonov <samsonov@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Lennert Buytenhek 提交于
The Discovery Duo (MV78xx0) has two x4 PCIe ports which can either be used in x4 mode or in quad x1 mode. This patch adds an accessor function to the generic plat-orion PCIe handling code to detect in which of the two modes we're running (which is determined by strap pins and/or configured by the bootloader). Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Saeed Bishara 提交于
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Lennert Buytenhek 提交于
This patch adds support for the unified Feroceon L2 cache controller as found in e.g. the Marvell Kirkwood and Marvell Discovery Duo families of ARM SoCs. Note that: - Page table walks are outer uncacheable on Kirkwood and Discovery Duo, since the ARMv5 spec provides no way to indicate outer cacheability of page table walks (specifying it in TTBR[4:3] is an ARMv6+ feature). This requires adding L2 cache clean instructions to proc-feroceon.S (dcache_clean_area(), set_pte()) as well as to tlbflush.h ({flush,clean}_pmd_entry()). The latter case is handled by defining a new TLB type (TLB_FEROCEON) which is almost identical to the v4wbi one but provides a TLB_L2CLEAN_FR flag. - The Feroceon L2 cache controller supports L2 range (i.e. 'clean L2 range by MVA' and 'invalidate L2 range by MVA') operations, and this patch uses those range operations for all Linux outer cache operations, as they are faster than the regular per-line operations. L2 range operations are not interruptible on this hardware, which avoids potential livelock issues, but can be bad for interrupt latency, so there is a compile-time tunable (MAX_RANGE_SIZE) which allows you to select the maximum range size to operate on at once. (Valid range is between one cache line and one 4KiB page, and must be a multiple of the line size.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Stanislav Samsonov 提交于
This patch adds support for the L1 D cache range operations that are supported by the Marvell Discovery Duo and Marvell Kirkwood ARM SoCs. Signed-off-by: NStanislav Samsonov <samsonov@marvell.com> Acked-by: NSaeed Bishara <saeed@marvell.com> Reviewed-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Lennert Buytenhek 提交于
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU core running at between 400 MHz and 1.0 GHz, and features a 64 bit DDR controller, 512K of internal SRAM, two x4 PCI-Express ports, two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs, two TWSI controllers, and IDMA/XOR engines. This patch adds support for the Marvell LB88RC8480 Development Board, enabling the use of the PCIe interfaces, the ethernet interfaces, the TWSI interfaces and the UARTs. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Ke Wei 提交于
Some Feroceon-based SoCs have an MBUS bridge interrupt controller that requires writing a one instead of a zero to clear edge interrupt sources such as timer expiry. This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Lennert Buytenhek 提交于
Nuke the Orion-specific orion5x_{read,write} wrappers. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
-
由 Lennert Buytenhek 提交于
This define isn't used anywhere in the kernel tree -- nuke it. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
-
由 Nicolas Pitre 提交于
The implementation for memory copy functions on ARM had a (disabled) provision for aligning the source pointer before loading registers with data. Turns out that aligning the _destination_ pointer is much more useful, as the read side is already sufficiently helped with the use of preload. So this changes the definition of the CALGN() macro to target the destination pointer instead, and turns it on for Feroceon processors where the gain is very noticeable. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
-
- 19 6月, 2008 6 次提交
-
-
由 Jordan Crouse 提交于
General Software writes their own VSA2 module for their version of the Geode BIOS, which returns a different ID then the standard VSA2. This was causing the framebuffer driver to break for most GSW boards. Signed-off-by: NJordan Crouse <jordan.crouse@amd.com> Cc: tglx@linutronix.de Cc: linux-geode@lists.infradead.org Signed-off-by: NIngo Molnar <mingo@elte.hu>
-
由 Sonic Zhang 提交于
This allows other threads to run when the serial driver polls the CTS PIN in a loop. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
由 Sonic Zhang 提交于
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
由 Jeremy Fitzhardinge 提交于
When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can potentially have the same number of physical address bits as the 64-bit host ("Enhanced Legacy PAE Paging"). This means, in theory, we could have up to 52 bits of physical address in a pte. The 32-bit kernel uses a 32-bit unsigned long to represent a pfn. This means that it can only represent physical addresses up to 32+12=44 bits wide. Rather than widening pfns everywhere, just set 2^44 as the Linux x86_32-PAE architectural limit for physical address size. This is a bugfix for two cases: 1. running a 32-bit PAE kernel on a machine with more than 64GB RAM. 2. running a 32-bit PAE Xen guest on a host machine with more than 64GB RAM In both cases, a pte could need to have more than 36 bits of physical, and masking it to 36-bits will cause fairly severe havoc. Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: <stable@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
-
由 Dave Airlie 提交于
Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Joe Perches 提交于
Use boolean in AGP instead of having own TRUE/FALSE -- Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 18 6月, 2008 1 次提交
-
-
由 Patrick McHardy 提交于
Fix three ct_extend/NAT extension related races: - When cleaning up the extension area and removing it from the bysource hash, the nat->ct pointer must not be set to NULL since it may still be used in a RCU read side - When replacing a NAT extension area in the bysource hash, the nat->ct pointer must be assigned before performing the replacement - When reallocating extension storage in ct_extend, the old memory must not be freed immediately since it may still be used by a RCU read side Possibly fixes https://bugzilla.redhat.com/show_bug.cgi?id=449315 and/or http://bugzilla.kernel.org/show_bug.cgi?id=10875Signed-off-by: NPatrick McHardy <kaber@trash.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 17 6月, 2008 4 次提交
-
-
由 YOSHIFUJI Hideaki 提交于
We've introduced extra need of compat layer for ip_tunnel_prl{} for PRL (Potential Router List) management. Though compat_ioctl is still missing in ipv4/ipv6, let's make the interface more straight-forward and eliminate extra need for nasty compat layer anyway since the interface is new for 2.6.26. Signed-off-by: NYOSHIFUJI Hideaki <yoshfuji@linux-ipv6.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 David Woodhouse 提交于
This seems to have been removed accidentally in commit ed7b1889 ("Unexport asm/page.h"), but wasn't supposed to have been -- the original patch at http://lkml.org/lkml/2007/10/30/144 just moved it from $(header-y) to $(unifdef-y) Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 David Woodhouse 提交于
This file is only included where it makes sense now, so there's no need for the CONFIG_ARCH_SUPPORTS_AOUT conditional -- and that conditional is bad, because we want to export <linux/a.out.h> to userspace. Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Jack Steiner 提交于
Fix build error in CONFIG_IA64_SGI_UV config. (GENERIC builds are ok). Signed-off-by: NJack Steiner <steiner@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
-
- 16 6月, 2008 8 次提交
-
-
由 Thomas Bogendoerfer 提交于
Fix 64-bit Malta by using CKSEG0ADDR and correct casts. Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Thomas Horsten 提交于
After the common MIPS CPU interrupt controller (for irq0-7) was introduced the Lasat boards didn't get their interrupts right, so nothing worked. The old routines need to be offset by the new 8 hardware interrupts common to all MIPS CPU's. Signed-off-by: NThomas Horsten <thomas@horsten.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Chris Dearman 提交于
Signed-off-by: NChris Dearman <chris@mips.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Ralf Baechle 提交于
Build error was caused by commit 35133692. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 bruno randolf 提交于
In the conversion done in the commits 95c4eb3ef4484ca85da5c98780d358cffd546b90 9d360ab4 [MIPS] Alchemy: Renumber interrupts so irq_cpu can work. one reserved interrupt on au1500 was missed. this broke the au1000 ethernet driver. Signed-off-by: NBruno Randolf <br1@einfach.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Adrian Bunk 提交于
This fixes the following build error with CONFIG_BLK_DEV_IDE_PMAC=n: <-- snip --> ... CC drivers/macintosh/mediabay.o /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/macintosh/mediabay.c: In function 'check_media_bay': /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/macintosh/mediabay.c:428: error: 'struct media_bay_info' has no member named 'cd_index' make[3]: *** [drivers/macintosh/mediabay.o] Error 1 <-- snip --> Reported-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
由 Nick Piggin 提交于
lwsync is explicitly defined not to have any effect on the ordering of accesses to device memory, so it cannot be used for rmb(). sync appears to be the only barrier which fits the bill. Signed-off-by: NNick Piggin <npiggin@suse.de> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
-
由 Luke Browning 提交于
According to the CBEA, the SPU dsisr is not updated for class 0 exceptions. spu_stopped() is testing the dsisr that was passed to it from the class 0 exception handler, so we return a false positive here. This patch cleans up the interrupt handler and erroneous tests in spu_stopped. It also removes the fields from the csa since it is not needed to process class 0 events. Signed-off-by: NLuke Browning <lukebrowning@us.ibm.com> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
-
- 13 6月, 2008 7 次提交
-
-
由 Kyle McMartin 提交于
ip_fast_csum needs an asm "memory" clobber, otherwise the aggressive optimizations in gcc-4.3 cause it to be miscompiled. Signed-off-by: NKyle McMartin <kyle@mcmartin.ca>
-
由 Dave Hansen 提交于
We need this at least for huge page detection for now, because powerpc needs the vm_area_struct to be able to determine whether a virtual address is referring to a huge page (its pmd_huge() doesn't work). It might also come in handy for some of the other users. Signed-off-by: NDave Hansen <dave@linux.vnet.ibm.com> Acked-by: NMatt Mackall <mpm@selenic.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Mike Miller 提交于
Add support for the next generation of HP Smart Array SAS/SATA controllers. Shipping date is late Fall 2008. Bump the driver version to 3.6.20 to reflect the new hardware support from patch 1 of this set. Signed-off-by: NMike Miller <mike.miller@hp.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: <stable@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Ben Nizette 提交于
Move the forward-declaration of struct mm_struct a little way up proc_fs.h. This fixes a bunch of "'struct mm_struct' declared inside parameter list" warnings with CONFIG_PROC_FS=n Signed-off-by: NBen Nizette <bn@niasdigital.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Aneesh Kumar K.V 提交于
Add ext2_find_{first,next}_bit(), which are needed for ext4. They're derived out of the ext2_find_next_zero_bit found in the same file. Compile tested with crosstools [Reworked to preserve all symmetry with ext2_find_{first,next}_zero_bit()] This fixes http://bugzilla.kernel.org/show_bug.cgi?id=10393 [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 David S. Miller 提交于
This reverts two changesets, ec3c0982 ("[TCP]: TCP_DEFER_ACCEPT updates - process as established") and the follow-on bug fix 9ae27e0a ("tcp: Fix slab corruption with ipv6 and tcp6fuzz"). This change causes several problems, first reported by Ingo Molnar as a distcc-over-loopback regression where connections were getting stuck. Ilpo Järvinen first spotted the locking problems. The new function added by this code, tcp_defer_accept_check(), only has the child socket locked, yet it is modifying state of the parent listening socket. Fixing that is non-trivial at best, because we can't simply just grab the parent listening socket lock at this point, because it would create an ABBA deadlock. The normal ordering is parent listening socket --> child socket, but this code path would require the reverse lock ordering. Next is a problem noticed by Vitaliy Gusev, he noted: ---------------------------------------- >--- a/net/ipv4/tcp_timer.c >+++ b/net/ipv4/tcp_timer.c >@@ -481,6 +481,11 @@ static void tcp_keepalive_timer (unsigned long data) > goto death; > } > >+ if (tp->defer_tcp_accept.request && sk->sk_state == TCP_ESTABLISHED) { >+ tcp_send_active_reset(sk, GFP_ATOMIC); >+ goto death; Here socket sk is not attached to listening socket's request queue. tcp_done() will not call inet_csk_destroy_sock() (and tcp_v4_destroy_sock() which should release this sk) as socket is not DEAD. Therefore socket sk will be lost for freeing. ---------------------------------------- Finally, Alexey Kuznetsov argues that there might not even be any real value or advantage to these new semantics even if we fix all of the bugs: ---------------------------------------- Hiding from accept() sockets with only out-of-order data only is the only thing which is impossible with old approach. Is this really so valuable? My opinion: no, this is nothing but a new loophole to consume memory without control. ---------------------------------------- So revert this thing for now. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
由 Stefan Schmidt 提交于
Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but the latter is not included. Also fix one whitespace issue while being there. Signed-off-by: NAntonio Ospite <ao2@openezx.org> Signed-off-by: NStefan Schmidt <stefan@datenfreihafen.org> Acked-by: NEric Miao <eric.miao@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 12 6月, 2008 2 次提交
-
-
由 Jeremy Fitzhardinge 提交于
timespec_add_ns is used from the x86-64 vdso, which cannot call out to other kernel code. Make sure that timespec_add_ns is always inlined (and only uses always_inlined functions) to make sure there are no unexpected calls. Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
-
由 Jeremy Fitzhardinge 提交于
iter_div_u64_rem is used in the x86-64 vdso, which cannot call other kernel code. For this case, provide the always_inlined version, __iter_div_u64_rem. Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
-