- 27 10月, 2011 28 次提交
-
-
由 Shashidhar Hiremath 提交于
The Patch adds the support for SDIO interrupts for all slots. It includes enabling of SDIO interrupts through dw_mci_enable_sdio_irq and the handling of the slot specific interrupts in the Interrupt Service Routine. Signed-off-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Subhash Jadavani 提交于
If DMA resource is not available then SDCC driver should atleast work in PIO data transfer mode. Signed-off-by: NSubhash Jadavani <subhashj@codeaurora.org> Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Sahitya Tummala 提交于
Intialize busclk_timer before it is accessed in probe. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Sahitya Tummala 提交于
Not all targets have IRQ1 line routed from the SD controller to the processor. So we cannot rely on IRQ1 for PIO interrupts. This patch moves all PIO interrupts to IRQ0 and enables the PIO mode. Signed-off-by: NMurali Palnati <palnatim@codeaurora.org> Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Sahitya Tummala 提交于
On some targets, MCI_IRQ_MASK1 is not routed to the MSM in which case only "cmd_irq" must be used even for PIO. With this change, all the targets will use only "cmd_irq" for both CMD and PIO. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Sahitya Tummala 提交于
For clocks that support rates which can be set (most clocks other than _pclk AHB clocks), a rate must be set using clk_set_rate() before the clock is enabled for the first time with clk_enable(). Subsequent calls to clk_enable() need not be preceded with the clk_set_rate() calls unless we wish to change the clock rate that is set previously. SDC host->clk is currently enabled without setting the clock rate even once. This patch fixes this, by ensuring that the clock rate for this clock is first set before enabling the clock. Signed-off-by: NMurali Palnati <palnatim@codeaurora.org> Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Sahitya Tummala 提交于
Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Alexander Tarasikov 提交于
This allows boards with non-standard sdio cards to fill the CIS/CCCR data. It is particularly important for old msm72k boards using wl1251. Also drop the obsolete embedded_sdio_data structure from the header as it was intended to surve a similiar purpose but was not implemented. Signed-off-by: NAlexander Tarasikov <alexander.tarasikov@gmail.com> Acked-by: NSahitya Tummala <stummala@codeaurora.org> [davidb: minor formatting cleanup] Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Alexander Tarasikov 提交于
The use of && instead of || caused a NULL pointer dereference if gpio setup was not passed via platform data Signed-off-by: NAlexander Tarasikov <alexander.tarasikov@gmail.com> Acked-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Simon Horman 提交于
Allow named IRQs to use corresponding specific handlers. If named IRQs are used, at least an "sdcard" IRQ has to be specified by the platform. If names are not used, an arbitrary number of IRQs can be provided by the platform, in which case the generic ISR will be used for each of them. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> [g.liakhovetski@gmx.de: style and typo corrections, platform data check] Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Simon Horman 提交于
Provide separate interrupt handlers which may be used by platforms where SDHI has three interrupt sources. This patch also removes the commented-out handling of CRC and other errors. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Simon Horman 提交于
This avoids the need to look up the masks each time an interrupt is handled. As suggested by Guennadi. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Venkatraman S 提交于
Fix the sparse warning output "warning: Using plain integer as NULL pointer" Signed-off-by: NVenkatraman S <svenkatr@ti.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Venkatraman S 提交于
Fix the sparse warning "drivers/mmc/card/queue.c:111:20: warning: symbol 'mmc_alloc_sg' was not declared. Should it be static?" Signed-off-by: NVenkatraman S <svenkatr@ti.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Sascha Hauer 提交于
The individual SoC dependency in Kconfig hardly scales anymore. Instead of having such a fine grained dependency just depend on ARCH_MXC and risk that the uninformed user has to look in the help text to figure out which driver is the correct one. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Grant Likely 提交于
Add hooks to read gpio configuration out of the device tree node. [grant.likely: Rewrite of original patch from John Bonesio] Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> [swarren: Fixed tegra_sdhci_get_ro() to retrieve pdata correctly] [swarren: Reworked to avoid #ifdef CONFIG_OF] [swarren: Reworked binding based on fsl-imx-esdhc.txt] [swarren: Documented binding] Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Daniel Drake 提交于
Now that we have improved the runtime power management powerup/powerdown code, we believe that MMC_CAP_POWER_OFF_CARD is no longer necessary: runtime PM should now work everywhere. The only hard evidence for introducing MMC_CAP_POWER_OFF_CARD was the Marvell sd8686 wifi chip, which was believed to require external gpio manipulation which wasn't supported by some boards. After further investigation it was realized (and confirmed by Marvell folks) that sd8686 requirements can be fulfilled by changing the reset sequence itself, even if no external gpio is manipulated. For further information, see the following thread: http://www.mail-archive.com/linux-mmc@vger.kernel.org/msg04289.html Enable this trivially for a release or two. If no problems are reported, we will follow up with a more extensive patch to remove this flag altogether. If problems are reported, we can look at whitelist/blacklist possibilities as before. Signed-off-by: NDaniel Drake <dsd@laptop.org> Acked-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Per Forlin 提交于
This adds support to inject data errors after a completed host transfer. The mmc core will return error even though the host transfer is successful. This simple fault injection proved to be very useful to test the non-blocking error handling in the mmc_blk_issue_rw_rq(). Random faults can also test how the host driver handles pre_req() and post_req() in case of errors. Signed-off-by: NPer Forlin <per.forlin@linaro.org> Acked-by: NAkinobu Mita <akinobu.mita@gmail.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Richard Zhu 提交于
Eanble the ADMA2 mode for freescale esdhc imx driver, tested on MX25 3DS board, MX51 BBG board and MX53 LOCO board. This patch is only used to enable the ADMA2 for MX51/53 platforms. MX25/35 can't support the ADMA2 mode, set BROKEN_ADMA quirk on MX25/35 platforms. The ADMA mode supported or not can be distinguished by bit 20 of the Capability Register (offset 0x40) in the FSL eSDHC module. Signed-off-by: NRichard Zhu <richard.zhu@linaro.org> Tested-and-acked-by: NEric Miao <eric.miao@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Nicolas Ferre 提交于
Remove the use of irq_to_gpio() in the card detection interrupt handler. The information is available in the board structure and we can avoid using a function that has little meaning. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
This patch fixes a potential issue about PDC interrupts. For example we have a ENDRX pending interrupt and a RXBUFF pending interrupt. We have received the RXBUFF interrupt but the transfer is not finished (so we didn't have time to give a new buffer to the PDC controller). Then we will compute ENDRX interrupt and we will give a new buffer to the PDC controller, just after we will compute the RXBUFF interrupt and give one or two new buffers to the PDC controller but we are not sure that the first buffer given has been filled. So in this situation we may have "lost" one sg buffer. It's the same for transmission. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Assuming that a sg buffer size is a page size is false so use sg_dma_len. A 4096 bytes can be required with two 2048-bytes sg buffer. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Rename atmci_start_command() to atmci_send_command() which is more appropriate; atmci_start_command suggests we're sending a start command. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Add pdc support for atmel-mci. It makes at91-mci driver useless because it was only used for the old atmel MCI core which has pdc but no dma support. To allow removing at91-mci, the capabilities of the MCI core are detected at runtime -- then the driver will use pio, pdc or dma transfers. Warning: at91rm9200 is not supported, to support it we need to use swab32 on data but I have no board to test it. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Change atmci_readl and atmci_writel macros: remove string concatenation. We can use these macros with registers which are not prefixed by ATMCI_. This is the case if we want to write PDC registers which are common to several devices so they are not prefixed with ATMCI_. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Ludovic Desroches 提交于
Homogenize namespace to atmci. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
- 01 9月, 2011 6 次提交
-
-
由 Girish K S 提交于
This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's. During the card identification stage the mmc core driver enumerates for the best bus width in combination with the highest available data rate. It starts enumerating from the highest bus width (8) to lowest width (1). In case of few MMC cards the 4-bit bus enumeration fails and tries the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver has to clear the previous bus width setting and apply the new setting. The current patch will clear the previous bus mode and apply the new mode setting. Signed-off-by: NGirish K S <girish.shivananjappa@linaro.org> Acked-by: NJaehoon Chung <jh80.chung@samsung.com> Cc: <stable@kernel.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Subhash Jadavani 提交于
mmc_sd_init_uhs_card function sets the driver type, current limit and bus speed mode on card as well as on host controller side. Currently bus speed mode is set by sending CMD6 to card and immediately setting the timing mode in host controller. But then before initiating tuning sequence, it also tries to set current limit by sending CMD6 to card which results in data timeout errors in controller if bus speed mode is SDR50/SDR104 mode. So basically bus speed mode should be set only after current limit is set in the card and immediately after setting the bus speed mode, tuning sequence should be initiated. Signed-off-by: NSubhash Jadavani <subhashj@codeaurora.org> Reviewed-by: NArindam Nath <arindam.nath@amd.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Simon Horman 提交于
This corrects a logic error that I introduced in "mmc: sdhi: Add write16_hook" Reported-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Mika Westerberg 提交于
The default multithread workqueue can cause the same work to be executed concurrently on a different CPUs. This isn't really suitable for clock gating as it might already gated the clock and gating it twice results both host->clk_old and host->ios.clock to be set to 0. To prevent this from happening we use system_nrt_wq instead. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NChris Ball <cjb@laptop.org> Cc: <stable@kernel.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Mika Westerberg 提交于
We have seen at least two different races when clock gating kicks in in a middle of ios structure update. First one happens when ios->clock is changed outside of aggressive clock gating framework, for example via mmc_set_clock(). The race might happen when we run following code: mmc_set_ios(): ... if (ios->clock > 0) mmc_set_ungated(host); Now if gating kicks in right after the condition check we end up setting host->clk_gated to false even though we have just gated the clock. Next time a request is started we try to ungate and restore the clock in mmc_host_clk_hold(). However since we have host->clk_gated set to false the original clock is not restored. This eventually will cause the host controller to hang since its clock is disabled while we are trying to issue a request. For example on Intel Medfield platform we see: [ 13.818610] mmc2: Timeout waiting for hardware interrupt. [ 13.818698] sdhci: =========== REGISTER DUMP (mmc2)=========== [ 13.818753] sdhci: Sys addr: 0x00000000 | Version: 0x00008901 [ 13.818804] sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000 [ 13.818853] sdhci: Argument: 0x00000000 | Trn mode: 0x00000000 [ 13.818903] sdhci: Present: 0x1fff0000 | Host ctl: 0x00000001 [ 13.818951] sdhci: Power: 0x0000000d | Blk gap: 0x00000000 [ 13.819000] sdhci: Wake-up: 0x00000000 | Clock: 0x00000000 [ 13.819049] sdhci: Timeout: 0x00000000 | Int stat: 0x00000000 [ 13.819098] sdhci: Int enab: 0x00ff00c3 | Sig enab: 0x00ff00c3 [ 13.819147] sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000 [ 13.819196] sdhci: Caps: 0x6bee32b2 | Caps_1: 0x00000000 [ 13.819245] sdhci: Cmd: 0x00000000 | Max curr: 0x00000000 [ 13.819292] sdhci: Host ctl2: 0x00000000 [ 13.819331] sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x00000000 [ 13.819377] sdhci: =========================================== [ 13.919605] mmc2: Reset 0x2 never completed. and it never recovers. Second race might happen while running mmc_power_off(): static void mmc_power_off(struct mmc_host *host) { host->ios.clock = 0; host->ios.vdd = 0; [ clock gating kicks in here ] /* * Reset ocr mask to be the highest possible voltage supported for * this mmc host. This value will be used at next power up. */ host->ocr = 1 << (fls(host->ocr_avail) - 1); if (!mmc_host_is_spi(host)) { host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; host->ios.chip_select = MMC_CS_DONTCARE; } host->ios.power_mode = MMC_POWER_OFF; host->ios.bus_width = MMC_BUS_WIDTH_1; host->ios.timing = MMC_TIMING_LEGACY; mmc_set_ios(host); } If the clock gating worker kicks in while we are only partially updated the ios structure the host controller gets incomplete ios and might not work as supposed. Again on Intel Medfield platform we get: [ 4.185349] kernel BUG at drivers/mmc/host/sdhci.c:1155! [ 4.185422] invalid opcode: 0000 [#1] PREEMPT SMP [ 4.185509] Modules linked in: [ 4.185565] [ 4.185608] Pid: 4, comm: kworker/0:0 Not tainted 3.0.0+ #240 Intel Corporation Medfield/iCDKA [ 4.185742] EIP: 0060:[<c136364e>] EFLAGS: 00010083 CPU: 0 [ 4.185827] EIP is at sdhci_set_power+0x3e/0xd0 [ 4.185891] EAX: f5ff98e0 EBX: f5ff98e0 ECX: 00000000 EDX: 00000001 [ 4.185970] ESI: f5ff977c EDI: f5ff9904 EBP: f644fe98 ESP: f644fe94 [ 4.186049] DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068 [ 4.186125] Process kworker/0:0 (pid: 4, ti=f644e000 task=f644c0e0 task.ti=f644e000) [ 4.186219] Stack: [ 4.186257] f5ff98e0 f644feb0 c1365173 00000282 f5ff9460 f5ff96e0 f5ff96e0 f644feec [ 4.186418] c1355bd8 f644c0e0 c1499c3d f5ff96e0 f644fed4 00000006 f5ff96e0 00000286 [ 4.186579] f644fedc c107922b f644feec 00000286 f5ff9460 f5ff9700 f644ff10 c135839e [ 4.186739] Call Trace: [ 4.186802] [<c1365173>] sdhci_set_ios+0x1c3/0x340 [ 4.186883] [<c1355bd8>] mmc_gate_clock+0x68/0x120 [ 4.186963] [<c1499c3d>] ? _raw_spin_unlock_irqrestore+0x4d/0x60 [ 4.187052] [<c107922b>] ? trace_hardirqs_on+0xb/0x10 [ 4.187134] [<c135839e>] mmc_host_clk_gate_delayed+0xbe/0x130 [ 4.187219] [<c105ec09>] ? process_one_work+0xf9/0x5b0 [ 4.187300] [<c135841d>] mmc_host_clk_gate_work+0xd/0x10 [ 4.187379] [<c105ec82>] process_one_work+0x172/0x5b0 [ 4.187457] [<c105ec09>] ? process_one_work+0xf9/0x5b0 [ 4.187538] [<c1358410>] ? mmc_host_clk_gate_delayed+0x130/0x130 [ 4.187625] [<c105f3c8>] worker_thread+0x118/0x330 [ 4.187700] [<c1496cee>] ? preempt_schedule+0x2e/0x50 [ 4.187779] [<c105f2b0>] ? rescuer_thread+0x1f0/0x1f0 [ 4.187857] [<c1062cf4>] kthread+0x74/0x80 [ 4.187931] [<c1062c80>] ? __init_kthread_worker+0x60/0x60 [ 4.188015] [<c149acfa>] kernel_thread_helper+0x6/0xd [ 4.188079] Code: 81 fa 00 00 04 00 0f 84 a7 00 00 00 7f 21 81 fa 80 00 00 00 0f 84 92 00 00 00 81 fa 00 00 0 [ 4.188780] EIP: [<c136364e>] sdhci_set_power+0x3e/0xd0 SS:ESP 0068:f644fe94 [ 4.188898] ---[ end trace a7b23eecc71777e4 ]--- This BUG() comes from the fact that ios.power_mode was still in previous value (MMC_POWER_ON) and ios.vdd was set to zero. We prevent these by inhibiting the clock gating while we update the ios structure. Both problems can be reproduced by simply running the device in a reboot loop. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NChris Ball <cjb@laptop.org> Cc: <stable@kernel.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Mika Westerberg 提交于
As per suggestion by Linus Walleij: > If you think the names of the functions are confusing then > you may rename them, say like this: > > mmc_host_clk_ungate() -> mmc_host_clk_hold() > mmc_host_clk_gate() -> mmc_host_clk_release() > > Which would make the usecases more clear (This is CC'd to stable@ because the next two patches, which fix observable races, depend on it.) Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Cc: <stable@kernel.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
- 29 8月, 2011 1 次提交
-
-
由 Shawn Guo 提交于
There are the following warnings and errorx when compiling the driver. The patch adds the missing inclusion of linux/module.h to fix them. drivers/mmc/host/sdhci-esdhc-imx.c:563:12: error: ‘THIS_MODULE’ undeclared here (not in a function) [..] Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
-
- 23 8月, 2011 1 次提交
-
-
由 Christoph Hellwig 提交于
Add a new REQ_PRIO to let requests preempt others in the cfq I/O schedule, and lave REQ_META purely for marking requests as metadata in blktrace. All existing callers of REQ_META except for XFS are updated to also set REQ_PRIO for now. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NNamhyung Kim <namhyung@gmail.com> Signed-off-by: NJens Axboe <jaxboe@fusionio.com>
-
- 14 8月, 2011 4 次提交
-
-
由 Seungwon Jeon 提交于
Host driver can't get a hint of DDR mode through ios->ddr flag anymore. ios->timing is currently used to inform DDR mode as a substitute. And capability of MMC_CAP_MMC_HIGHSPEED is added for DDR support. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Jaehoon Chung 提交于
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Andy Shevchenko 提交于
When timeout_clk is calculated the host->clock could be zero. So, instead of host->clock the calculation now uses mmc->f_max. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-
由 Andy Shevchenko 提交于
This moves the calculation below the assignment of mmc->f_max, which we need for calculating timeout_clk in the next patch in this series. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
-