- 27 10月, 2011 28 次提交
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由 Shashidhar Hiremath 提交于
The Patch adds the support for SDIO interrupts for all slots. It includes enabling of SDIO interrupts through dw_mci_enable_sdio_irq and the handling of the slot specific interrupts in the Interrupt Service Routine. Signed-off-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Subhash Jadavani 提交于
If DMA resource is not available then SDCC driver should atleast work in PIO data transfer mode. Signed-off-by: NSubhash Jadavani <subhashj@codeaurora.org> Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sahitya Tummala 提交于
Intialize busclk_timer before it is accessed in probe. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sahitya Tummala 提交于
Not all targets have IRQ1 line routed from the SD controller to the processor. So we cannot rely on IRQ1 for PIO interrupts. This patch moves all PIO interrupts to IRQ0 and enables the PIO mode. Signed-off-by: NMurali Palnati <palnatim@codeaurora.org> Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sahitya Tummala 提交于
On some targets, MCI_IRQ_MASK1 is not routed to the MSM in which case only "cmd_irq" must be used even for PIO. With this change, all the targets will use only "cmd_irq" for both CMD and PIO. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sahitya Tummala 提交于
For clocks that support rates which can be set (most clocks other than _pclk AHB clocks), a rate must be set using clk_set_rate() before the clock is enabled for the first time with clk_enable(). Subsequent calls to clk_enable() need not be preceded with the clk_set_rate() calls unless we wish to change the clock rate that is set previously. SDC host->clk is currently enabled without setting the clock rate even once. This patch fixes this, by ensuring that the clock rate for this clock is first set before enabling the clock. Signed-off-by: NMurali Palnati <palnatim@codeaurora.org> Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sahitya Tummala 提交于
Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Alexander Tarasikov 提交于
This allows boards with non-standard sdio cards to fill the CIS/CCCR data. It is particularly important for old msm72k boards using wl1251. Also drop the obsolete embedded_sdio_data structure from the header as it was intended to surve a similiar purpose but was not implemented. Signed-off-by: NAlexander Tarasikov <alexander.tarasikov@gmail.com> Acked-by: NSahitya Tummala <stummala@codeaurora.org> [davidb: minor formatting cleanup] Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Alexander Tarasikov 提交于
The use of && instead of || caused a NULL pointer dereference if gpio setup was not passed via platform data Signed-off-by: NAlexander Tarasikov <alexander.tarasikov@gmail.com> Acked-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Simon Horman 提交于
Allow named IRQs to use corresponding specific handlers. If named IRQs are used, at least an "sdcard" IRQ has to be specified by the platform. If names are not used, an arbitrary number of IRQs can be provided by the platform, in which case the generic ISR will be used for each of them. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> [g.liakhovetski@gmx.de: style and typo corrections, platform data check] Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Simon Horman 提交于
Provide separate interrupt handlers which may be used by platforms where SDHI has three interrupt sources. This patch also removes the commented-out handling of CRC and other errors. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Simon Horman 提交于
This avoids the need to look up the masks each time an interrupt is handled. As suggested by Guennadi. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <magnus.damm@gmail.com> Signed-off-by: NSimon Horman <horms@verge.net.au> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Venkatraman S 提交于
Fix the sparse warning output "warning: Using plain integer as NULL pointer" Signed-off-by: NVenkatraman S <svenkatr@ti.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Venkatraman S 提交于
Fix the sparse warning "drivers/mmc/card/queue.c:111:20: warning: symbol 'mmc_alloc_sg' was not declared. Should it be static?" Signed-off-by: NVenkatraman S <svenkatr@ti.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Sascha Hauer 提交于
The individual SoC dependency in Kconfig hardly scales anymore. Instead of having such a fine grained dependency just depend on ARCH_MXC and risk that the uninformed user has to look in the help text to figure out which driver is the correct one. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Grant Likely 提交于
Add hooks to read gpio configuration out of the device tree node. [grant.likely: Rewrite of original patch from John Bonesio] Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> [swarren: Fixed tegra_sdhci_get_ro() to retrieve pdata correctly] [swarren: Reworked to avoid #ifdef CONFIG_OF] [swarren: Reworked binding based on fsl-imx-esdhc.txt] [swarren: Documented binding] Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Daniel Drake 提交于
Now that we have improved the runtime power management powerup/powerdown code, we believe that MMC_CAP_POWER_OFF_CARD is no longer necessary: runtime PM should now work everywhere. The only hard evidence for introducing MMC_CAP_POWER_OFF_CARD was the Marvell sd8686 wifi chip, which was believed to require external gpio manipulation which wasn't supported by some boards. After further investigation it was realized (and confirmed by Marvell folks) that sd8686 requirements can be fulfilled by changing the reset sequence itself, even if no external gpio is manipulated. For further information, see the following thread: http://www.mail-archive.com/linux-mmc@vger.kernel.org/msg04289.html Enable this trivially for a release or two. If no problems are reported, we will follow up with a more extensive patch to remove this flag altogether. If problems are reported, we can look at whitelist/blacklist possibilities as before. Signed-off-by: NDaniel Drake <dsd@laptop.org> Acked-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Per Forlin 提交于
This adds support to inject data errors after a completed host transfer. The mmc core will return error even though the host transfer is successful. This simple fault injection proved to be very useful to test the non-blocking error handling in the mmc_blk_issue_rw_rq(). Random faults can also test how the host driver handles pre_req() and post_req() in case of errors. Signed-off-by: NPer Forlin <per.forlin@linaro.org> Acked-by: NAkinobu Mita <akinobu.mita@gmail.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Richard Zhu 提交于
Eanble the ADMA2 mode for freescale esdhc imx driver, tested on MX25 3DS board, MX51 BBG board and MX53 LOCO board. This patch is only used to enable the ADMA2 for MX51/53 platforms. MX25/35 can't support the ADMA2 mode, set BROKEN_ADMA quirk on MX25/35 platforms. The ADMA mode supported or not can be distinguished by bit 20 of the Capability Register (offset 0x40) in the FSL eSDHC module. Signed-off-by: NRichard Zhu <richard.zhu@linaro.org> Tested-and-acked-by: NEric Miao <eric.miao@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Nicolas Ferre 提交于
Remove the use of irq_to_gpio() in the card detection interrupt handler. The information is available in the board structure and we can avoid using a function that has little meaning. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
This patch fixes a potential issue about PDC interrupts. For example we have a ENDRX pending interrupt and a RXBUFF pending interrupt. We have received the RXBUFF interrupt but the transfer is not finished (so we didn't have time to give a new buffer to the PDC controller). Then we will compute ENDRX interrupt and we will give a new buffer to the PDC controller, just after we will compute the RXBUFF interrupt and give one or two new buffers to the PDC controller but we are not sure that the first buffer given has been filled. So in this situation we may have "lost" one sg buffer. It's the same for transmission. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Assuming that a sg buffer size is a page size is false so use sg_dma_len. A 4096 bytes can be required with two 2048-bytes sg buffer. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Rename atmci_start_command() to atmci_send_command() which is more appropriate; atmci_start_command suggests we're sending a start command. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Add pdc support for atmel-mci. It makes at91-mci driver useless because it was only used for the old atmel MCI core which has pdc but no dma support. To allow removing at91-mci, the capabilities of the MCI core are detected at runtime -- then the driver will use pio, pdc or dma transfers. Warning: at91rm9200 is not supported, to support it we need to use swab32 on data but I have no board to test it. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Change atmci_readl and atmci_writel macros: remove string concatenation. We can use these macros with registers which are not prefixed by ATMCI_. This is the case if we want to write PDC registers which are common to several devices so they are not prefixed with ATMCI_. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ludovic Desroches 提交于
Homogenize namespace to atmci. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 17 10月, 2011 3 次提交
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由 Michał Mirosław 提交于
Private rx_csum flags are now duplicate of netdev->features & NETIF_F_RXCSUM. Removing this needs deeper surgery. Things noticed: - HW VLAN acceleration probably can be toggled, but it's left as is - the resets on RX csum offload change can probably be avoided - there is A LOT of copy-and-pasted code here Signed-off-by: NMichał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jacob Keller 提交于
When enabling hardware timestamping for ptp v2 event packets, the software does not setup the queue for l4 packets, although layer 4 packets are valid for v2. This patch adds the flag which enables setting up a queue and enabling udp packet timestamping. Signed-off-by: NJacob E Keller <jacob.e.keller@intel.com> Tested-by: NAaron Brown <aaron.f.brown@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Greg Rose 提交于
Implements the new netdev op to allow user configuration of spoof checking on a per VF basis. V2 - Change netdev spoof check op setting to bool Signed-off-by: NGreg Rose <gregory.v.rose@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 16 10月, 2011 1 次提交
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由 Bruce Allan 提交于
Commit 67fd4fcb (e1000e: convert to stats64) added the ability to update statistics more accurately and on-demand through the net_device_ops .ndo_get_stats64 hook, but introduced a locking bug on 82577/8/9 when linked at half-duplex (seen on kernels with CONFIG_DEBUG_ATOMIC_SLEEP=y and CONFIG_PROVE_LOCKING=y). The commit introduced code paths that caused a mutex to be locked in atomic contexts, e.g. an rcu_read_lock is held when irqbalance reads the stats from /sys/class/net/ethX/statistics causing the mutex to be locked to read the Phy half-duplex statistics registers. The mutex was originally introduced to prevent concurrent accesses of resources (the NVM and Phy) shared by the driver, firmware and hardware a few years back when there was an issue with the NVM getting corrupted. It was later split into two mutexes - one for the NVM and one for the Phy when it was determined the NVM, unlike the Phy, should not be protected by the software/firmware/hardware semaphore (arbitration of which is done in part with the SWFLAG bit in the EXTCNF_CTRL register). This latter semaphore should be sufficient to prevent resource contention of the Phy in the driver (i.e. the mutex for Phy accesses is not needed), but to be sure the mutex is replaced with an atomic bit flag which will warn if any contention is possible. Also add additional debug output to help determine when the sw/fw/hw semaphore is owned by the firmware or hardware. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Reported-by: NFrancois Romieu <romieu@fr.zoreil.com> Tested-by: NJeff Pieper <jeffrey.e.pieper@intel.com>
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- 15 10月, 2011 8 次提交
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由 Daniel Drake 提交于
The recent changes to only power the device when the interface up introduced a bug: changing interface type, legal when the interface is down, performs device I/O. Fix this functionality by validating and recording the interface type when the change is requested, but only applying the change if/when the interface is brought up. Signed-off-by: NDaniel Drake <dsd@laptop.org> Acked-by: NDan Williams <dcbw@redhat.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Renamed to be in sync with Marketing term and to avoid confusion with other chip names. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
The AR946/8x chips are 2x2 Dual band with BT support. In order to avoid misleading with other chips and to be in sync with marketing team's term, AR9480 is renamed as AR9462. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Support the fast channel change across band switch only when there are available of reusable cabliration results. And also observed that doing agc control calibration on fastcc, sometimes causing calibration timeout. Hence changing agc control to be run only on full chip reset. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Supported calibrations of radio retention table (RTT) are - DC offset - Filter - Peak detect Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
To improve sensitivity for AR9480, the normal and minimum noise floor values of both bands are updated. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
The commit "ath9k_hw: Improve fast channel change for AR9003 chips" fixes the fast channel change issue for AR9003 chips that was originally observed in AR9382 chip. Hence enabling fastcc support again for 11A channel for AR9003 chips. Cc: Paul Stewart <pstew@google.com> Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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由 Rajkumar Manoharan 提交于
Currently Tx IQ calibration is enabled by default for all AR9003 chips. But for AR9480, the calibration status should be read from chip after processing ini. And also the carrier leak calibration status is checked during init cal. As the init_cal is being called for fast channel change too, the tx_cl status only be read after full reset. Hence moving that into process ini function. Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
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