[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files.

bsp/at91sam9260/platform/rt_low_level_gcc.inc

@@ -29,3 +29,5 @@
 .equ IRQ_STK_SIZE,    4096
 .equ FIQ_STK_SIZE,    4096
 .equ SYS_STK_SIZE,    2048
+/* vector table start should be 0x00000000 or 0xFFFF0000 */
+.equ VECTOR_TABLE_START,    0x00000000

bsp/at91sam9260/platform/rt_low_level_iar.inc

@@ -29,3 +29,5 @@
 #define IRQ_STK_SIZE 1024
 #define FIQ_STK_SIZE 1024
 #define SYS_STK_SIZE 512
+/* vector table start should be 0x00000000 or 0xFFFF0000 */
+#define VECTOR_TABLE_START    0x00000000

bsp/at91sam9260/platform/rt_low_level_keil.inc

@@ -29,4 +29,6 @@ ABT_STK_SIZE EQU 512
 IRQ_STK_SIZE EQU 1024
 FIQ_STK_SIZE EQU 1024
 SYS_STK_SIZE EQU 512
+;/* vector table start should be 0x00000000 or 0xFFFF0000 */
+VECTOR_TABLE_START    0x00000000
     END

libcpu/arm/arm926/start_gcc.S

@@ -142,7 +142,7 @@ Reset_Handler:
 
     @; Copy Exception Vectors to Internal RAM
     LDR     R8, =entry              @; Source
-    LDR     R9, =0x00000000         @; Destination
+    LDR     R9, =VECTOR_TABLE_START @; Destination
     CMP     R8, R9
     BEQ     Setup_Stack
     LDMIA   R8!, {R0-R7}            @; Load Vectors

libcpu/arm/arm926/start_iar.S

@@ -143,7 +143,7 @@ Reset_Handler:
     
     ; Copy Exception Vectors to Internal RAM
     LDR     R8, =Entry_Point        ; Source
-    LDR     R9, =0x00000000         ; Destination
+    LDR     R9, =VECTOR_TABLE_START ; Destination
     CMP     R8, R9
     BEQ     Setup_Stack
     LDMIA   R8!, {R0-R7}            ; Load Vectors

libcpu/arm/arm926/start_rvds.S

@@ -150,7 +150,7 @@ Reset_Handler
 
     ; Copy Exception Vectors to Internal RAM
     LDR     R8, =Entry_Point        ; Source
-    LDR     R9, =0x00000000         ; Destination
+    LDR     R9, =VECTOR_TABLE_START ; Destination
     CMP     R8, R9
     BEQ     Setup_Stack
     LDMIA   R8!, {R0-R7}            ; Load Vectors