diff --git a/bsp/at91sam9260/platform/rt_low_level_gcc.inc b/bsp/at91sam9260/platform/rt_low_level_gcc.inc
index c6edd3787ccc5d21cacdee921878b1a8e8c7aae3..f9825f5b53b4d3b3ed7ce15cce363241f8e756a6 100644
--- a/bsp/at91sam9260/platform/rt_low_level_gcc.inc
+++ b/bsp/at91sam9260/platform/rt_low_level_gcc.inc
@@ -29,3 +29,5 @@
 .equ IRQ_STK_SIZE,    4096
 .equ FIQ_STK_SIZE,    4096
 .equ SYS_STK_SIZE,    2048
+/* vector table start should be 0x00000000 or 0xFFFF0000 */
+.equ VECTOR_TABLE_START,    0x00000000
diff --git a/bsp/at91sam9260/platform/rt_low_level_iar.inc b/bsp/at91sam9260/platform/rt_low_level_iar.inc
index 3046253d0727168c37e47eb96dd3cc357187befa..e5e62b04cb3556f06a7e833680a7b5e9f3daefc4 100644
--- a/bsp/at91sam9260/platform/rt_low_level_iar.inc
+++ b/bsp/at91sam9260/platform/rt_low_level_iar.inc
@@ -29,3 +29,5 @@
 #define IRQ_STK_SIZE 1024
 #define FIQ_STK_SIZE 1024
 #define SYS_STK_SIZE 512
+/* vector table start should be 0x00000000 or 0xFFFF0000 */
+#define VECTOR_TABLE_START    0x00000000
diff --git a/bsp/at91sam9260/platform/rt_low_level_keil.inc b/bsp/at91sam9260/platform/rt_low_level_keil.inc
index c3cde15ded56bb7220c4bc68572c85216c04462d..3ff929c3a6a01680d7ead870bed216d36292ef7c 100644
--- a/bsp/at91sam9260/platform/rt_low_level_keil.inc
+++ b/bsp/at91sam9260/platform/rt_low_level_keil.inc
@@ -29,4 +29,6 @@ ABT_STK_SIZE EQU 512
 IRQ_STK_SIZE EQU 1024
 FIQ_STK_SIZE EQU 1024
 SYS_STK_SIZE EQU 512
+;/* vector table start should be 0x00000000 or 0xFFFF0000 */
+VECTOR_TABLE_START    0x00000000
     END
diff --git a/libcpu/arm/arm926/start_gcc.S b/libcpu/arm/arm926/start_gcc.S
index ee26f96fc6936e5e13258147ea99deb0aa141b2d..05b39debc54143901afeb59a6f6227342cc2fc11 100644
--- a/libcpu/arm/arm926/start_gcc.S
+++ b/libcpu/arm/arm926/start_gcc.S
@@ -142,7 +142,7 @@ Reset_Handler:
 
     @; Copy Exception Vectors to Internal RAM
     LDR     R8, =entry              @; Source
-    LDR     R9, =0x00000000         @; Destination
+    LDR     R9, =VECTOR_TABLE_START @; Destination
     CMP     R8, R9
     BEQ     Setup_Stack
     LDMIA   R8!, {R0-R7}            @; Load Vectors
diff --git a/libcpu/arm/arm926/start_iar.S b/libcpu/arm/arm926/start_iar.S
index db3a253414291121b9fc9b1b2fcdbf09aa500553..b7cc9e170e69b879db10f1b862046f10fe36c9bc 100644
--- a/libcpu/arm/arm926/start_iar.S
+++ b/libcpu/arm/arm926/start_iar.S
@@ -143,7 +143,7 @@ Reset_Handler:
     
     ; Copy Exception Vectors to Internal RAM
     LDR     R8, =Entry_Point        ; Source
-    LDR     R9, =0x00000000         ; Destination
+    LDR     R9, =VECTOR_TABLE_START ; Destination
     CMP     R8, R9
     BEQ     Setup_Stack
     LDMIA   R8!, {R0-R7}            ; Load Vectors
diff --git a/libcpu/arm/arm926/start_rvds.S b/libcpu/arm/arm926/start_rvds.S
index 00e0c6136a7811cb575a9b3f4b1a9b2362b2c77a..cabcd6590b2f69c2a0d9e83f13df235429e95e45 100644
--- a/libcpu/arm/arm926/start_rvds.S
+++ b/libcpu/arm/arm926/start_rvds.S
@@ -150,7 +150,7 @@ Reset_Handler
 
     ; Copy Exception Vectors to Internal RAM
     LDR     R8, =Entry_Point        ; Source
-    LDR     R9, =0x00000000         ; Destination
+    LDR     R9, =VECTOR_TABLE_START ; Destination
     CMP     R8, R9
     BEQ     Setup_Stack
     LDMIA   R8!, {R0-R7}            ; Load Vectors