* [0D-Tensor] CINN supports argmax, fix infershape

* [0D-Tensor] CINN supports argmax, fix infershape

* add cast and repeat_interleave

* fix

* support custom verify

* fix

* fix

* fix

* fix coverage ci

* remove custom verify in assert

In XCCL 1.0.53.6 there is a bugfix to fork scenario in RDMA, which
was the root cause of dataloader segfault problem.

* unary bitwise_not adapter tensorRT8.6 in Paddle-TensorRT
* Update test_trt_inspector.py
* test_trt_convert_conv2d_transpose
* Update test_trt_convert_conv2d_transpose.py

* support_conv2d

* remove comment

* check code style

* add former Test

* check code style

* add unittest

* fix log

* change unittest

---------
Co-authored-by: zhoutianzi666 <17801055074@163.com>

* add more data type for all/any.

* remove xpu fix.

* add test unit.

* fix typename name.

* fix output data type.

* TensorSetConstantXPU support to use xpu::constant when T is float/float16

* add xpu_wait for TensorSetConstantXPU

Remove old schedules.

* fix

* fix

* fix

* fix

* [OpCompat] add fetch and update mish in op_compat.yaml

* add missing outputs

* fix codestyle

* [Paddle-TRT] add assign op

* add code

* fix bug

* refine code

* refine code

* fix bug

* distribute best cfg

* adapt to multi args transmission

* update metric extracting

* fix bugs of prune and reading log

* fix time default value

* remove time record

* adjust the order of searching dim

* fix prune bugs

* fix adding cfg bug

* fix multi nodes bug

* reset status

* remove alarm and set logdir

* deepcopy ctx

* change alarm

* fix restart bug

* add exit

* best no need alarm

* add warmup time

* add feed in op_compat.yaml

* remove input mapping

* add inplace interface

* support inplace

* refine code

* fix bug

* fix bug

* refien code

* add file

* add interface

* refine code

* refine code

* add phi kernel instruction

* refine code

* add test

* delete unuse code

* add test

* add test

* add deps

* delete unused code

* fix bug

* fix bug