* Add reduce sum op test
test=develop

* add layout, opencl docs. test=document_fix

* fix link in doc. test=develop, test=document_fix

test=develop

* mobilenetv1/v2,mnasnet,yolonano,sr models passed with opencl image2d kernel. test=develop

* Fix gflag shape define. test=develop

* Replace Softsign Eigen with c implementation
test=develop

* Optimize softmax. When the input tensor is 2-D and axis is 1, there is no need to resize.

* Optimize the gru, avoid calling Tensor::Slice.
test=develop

* Remove a std::vector in softmax.
test=develop

* Define CalculateSeqWidth to get the width of a sequence.
test=develop

* comment All opencl buffer kernels. test=develop

* refactor conv, depthwise into one routing selection. test=develop

fix fpga lite_tensor compile bug
     add fake quantize_abs_max op
     test=develop

Update mask demo docs, add model download from paddlehub

* [LITE][BM] support VGG,Inception,Mobilenet,Darknet, test=develop

* modify opt name test=develop

* fix code style test=develop

* test=develop

* replace gru RowWiseAdd Eigen with c implementation
test=develop

* update cuda doc. test=document_fix

* update for clang. test=document_fix

* [LITE][OPENCL] Add opencl image2d conv3x3. test=develop

* [DEMO] add mask detection demo, test=develop

* [DEMO] fix ssd detection demo bug, test=develop

* [LITE][OPENCL]Add scale kernel.

* [LITE][OPENCL]Add scale kernel, format code style.

add concat ut, test=develop

* fix axis compute, test=develop

* add other axis, test=develop

* fix ut. test=develop

* fix con+relu6/leakyRelu fusion in Fp32, test=develop

* note m=397 in sgemv_int8 ut, test=develop

* fix ios build error. test=develop

 fix conv_winograd multithreads bug 

* [ARM] add 5x5s2 depthwise conv armv8 impl, test=develop

* [ARM] add int8 5x5s2 dw conv armv7 impl, test=develop

* [ARM] add int8 5x5s2 dw conv impl, test=develop

* [ARM] close int8 conv ut, test=develop

[OPENCL] add sigmoid image2d kernel and ut