1. 16 3月, 2020 1 次提交
  2. 12 3月, 2020 1 次提交
    • M
      add mean op (#3130) · b9273631
      mapingshuo 提交于
      * add mean op, test=develop
      
      * split forward and backward, test=develop
      b9273631
  3. 09 3月, 2020 3 次提交
  4. 07 3月, 2020 1 次提交
  5. 05 3月, 2020 2 次提交
  6. 04 3月, 2020 1 次提交
  7. 03 3月, 2020 2 次提交
  8. 29 2月, 2020 1 次提交
  9. 28 2月, 2020 1 次提交
    • M
      add sequence_conv op and arm kernel (#3016) · 0775140a
      mapingshuo 提交于
      * add sequence_conv op and arm kernel
      
      * add test, test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * test=develop
      
      * modify code style. test=develop
      
      * fix ut, test=develop
      
      * delete unused code, test=develop
      0775140a
  10. 24 2月, 2020 1 次提交
  11. 20 2月, 2020 1 次提交
  12. 17 2月, 2020 1 次提交
  13. 13 2月, 2020 2 次提交
  14. 12 2月, 2020 2 次提交
  15. 11 2月, 2020 1 次提交
  16. 04 2月, 2020 1 次提交
    • Y
      [ARM] 5x5dw and sgemv support fuse activation, test=develop (#2797) · 928e2a24
      yiicy 提交于
      * refactor 5x5s1 dw conv armv8, test=develop
      
      * [ARM] refactor depthwise conv 5x5s1, and support relu6, leakey relu, test=develop
      
      * [ARM] sgemv support fuse relu6 and leakey relu,test=develop
      
      * [ARM] reduce some conv ut case, test=develop
      
      * [ARM] fix 5x5dw conv pick kernel bug, test=develop
      
      * fix code style, test=develop
      
      * [ARM] fix sgemv fuse relu6 bug, test=develop
      
      * [ARM] fix fp32 5x5s1 dw bug, test=develop
      
      * [ARM] fix fp32 5x5 dw conv pick kernel bug, test=develop
      928e2a24
  17. 24 1月, 2020 1 次提交
  18. 21 1月, 2020 1 次提交
  19. 19 1月, 2020 1 次提交
  20. 16 1月, 2020 1 次提交
  21. 15 1月, 2020 1 次提交
  22. 14 1月, 2020 3 次提交
  23. 13 1月, 2020 2 次提交
  24. 10 1月, 2020 1 次提交
  25. 09 1月, 2020 1 次提交
  26. 08 1月, 2020 1 次提交
  27. 07 1月, 2020 1 次提交
  28. 03 1月, 2020 1 次提交
  29. 31 12月, 2019 3 次提交
    • W
      X86 and cuda compile simutaneously cmake .. -DCMAKE_BUILD_TYPE=RelWithDebInfo... · f1cedb8f
      Wilber 提交于
      X86 and cuda compile simutaneously cmake ..  -DCMAKE_BUILD_TYPE=RelWithDebInfo  -DWITH_MKL=ON           -DLITE_WITH_CUDA=ON           -DWITH_MKLDNN=OFF           -DLITE_WITH_X86=ON           -DLITE_WITH_PROFILE=OFF          -DWITH_LITE=OFF           -DLITE_WITH_LIGHT_WEIGHT_FRAMEWORK=OFF           -DWITH_PYTHON=OFF           -DWITH_TESTING=ON           -DLITE_WITH_ARM=OFF           -DLITE_ON_TINY_PUBLISH=OFF           -DCUDNN_ROOT=/usr/local/cudnn/           -DLITE_BUILD_EXTRA=ON (#2708)
      
      x86 and cuda compile simutaneously
      f1cedb8f
    • Z
      [XPU] bn unit test (#2706) · bc6d5adc
      zhupengyang 提交于
      test=develop
      bc6d5adc
    • H
      [LITE][NPU][XPU] Refine the registration and implementation of op bridges (#2700) · a29c84a2
      hong19860320 提交于
      * Fix the compiling error which occurs when specify the ddk_root path and build for huawei NPU.
      
      * Refine the registration of op bridges and make it similar to the registration of op and kernel.
      
      * Refine the interfaces of the graph and node for op bridges, and support creating constant and data node automatically according to the attribute 'persistable' of the target tensor.
      
      * Add the unit test of the scale and softmax op bridge for NPU.
      a29c84a2