test=develop

05db5b7f · chenjiaoAngel · 3e4fcf4a · 05db5b7f · 05db5b7f
2 changed file
--- a/lite/backends/arm/math/conv3x3s1p01_depthwise_fp32_relu.cc
+++ b/lite/backends/arm/math/conv3x3s1p01_depthwise_fp32_relu.cc
@@ -2326,45 +2326,46 @@ void conv_depthwise_3x3s1p0_bias_no_relu(float *dout,
        int cnt = tile_w;
        unsigned int *rmask_ptr = rmask;
        unsigned int *vmask_ptr = vmask;
-        asm volatile(INIT_S1
-                     "sub %[din0_ptr], #8 @ 0pad + 2 float data overlap\n"
-                     "sub %[din1_ptr], #8 @ 0pad + 2 float data overlap\n"
-                     "sub %[din2_ptr], #8 @ 0pad + 2 float data overlap\n"
-                     "sub %[din3_ptr], #8 @ 0pad + 2 float data overlap\n"
-                     "vext.32  q6, q8, q9, #1     @ 0012\n"
-                     "vext.32  q7, q8, q9, #2     @ 1234\n" MID_COMPUTE_S1 MID_RESULT_S1
-                     "cmp  %[remain], #1             \n"
-                     "blt 0f                         \n" RIGHT_COMPUTE_S1 RIGHT_RESULT_S1
-                     "0:                         \n"
-                     : [dout_ptr1] "+r"(doutr0),
-                       [dout_ptr2] "+r"(doutr1),
-                       [din0_ptr] "+r"(din_ptr0),
-                       [din1_ptr] "+r"(din_ptr1),
-                       [din2_ptr] "+r"(din_ptr2),
-                       [din3_ptr] "+r"(din_ptr3),
-                       [cnt] "+r"(cnt),
-                       [rmask] "+r"(rmask_ptr),
-                       [vmask] "+r"(vmask_ptr)
-                     : [wr0] "w"(wr0),
-                       [wr1] "w"(wr1),
-                       [wr2] "w"(wr2),
-                       [bias_val] "r"(bias_val),
-                       [vzero] "w"(vzero),
-                       [remain] "r"(remain)
-                     : "cc",
-                       "memory",
-                       "q4",
-                       "q5",
-                       "q6",
-                       "q7",
-                       "q8",
-                       "q9",
-                       "q10",
-                       "q11",
-                       "q12",
-                       "q13",
-                       "q14",
-                       "q15");
+        asm volatile(
+            INIT_S1
+            "sub %[din0_ptr], #8 @ 0pad + 2 float data overlap\n"
+            "sub %[din1_ptr], #8 @ 0pad + 2 float data overlap\n"
+            "sub %[din2_ptr], #8 @ 0pad + 2 float data overlap\n"
+             "sub %[din3_ptr], #8 @ 0pad + 2 float data overlap\n"
+             "vext.32  q6, q8, q9, #1     @ 0012\n"
+             "vext.32  q7, q8, q9, #2     @ 1234\n" MID_COMPUTE_S1 MID_RESULT_S1
+             "cmp  %[remain], #1             \n"
+             "blt 0f                         \n" RIGHT_COMPUTE_S1 RIGHT_RESULT_S1
+             "0:                         \n"
+             : [dout_ptr1] "+r"(doutr0),
+               [dout_ptr2] "+r"(doutr1),
+               [din0_ptr] "+r"(din_ptr0),
+               [din1_ptr] "+r"(din_ptr1),
+               [din2_ptr] "+r"(din_ptr2),
+               [din3_ptr] "+r"(din_ptr3),
+               [cnt] "+r"(cnt),
+               [rmask] "+r"(rmask_ptr),
+               [vmask] "+r"(vmask_ptr)
+             : [wr0] "w"(wr0),
+               [wr1] "w"(wr1),
+               [wr2] "w"(wr2),
+               [bias_val] "r"(bias_val),
+               [vzero] "w"(vzero),
+               [remain] "r"(remain)
+             : "cc",
+               "memory",
+               "q4",
+               "q5",
+               "q6",
+                "q7",
+                "q8",
+                "q9",
+                "q10",
+                "q11",
+                "q12",
+                "q13",
+                "q14",
+                "q15");
        dout_ptr += 2 * w_out;
      }  //! end of processing mid rows
 #endif
@@ -2609,46 +2610,47 @@ void conv_depthwise_3x3s1p0_bias_relu(float *dout,
        int cnt = tile_w;
        unsigned int *rmask_ptr = rmask;
        unsigned int *vmask_ptr = vmask;
-        asm volatile(
-            INIT_S1
-            "sub %[din0_ptr], #8 @ 0pad + 2 float data overlap\n"
-            "sub %[din1_ptr], #8 @ 0pad + 2 float data overlap\n"
-            "sub %[din2_ptr], #8 @ 0pad + 2 float data overlap\n"
-            "sub %[din3_ptr], #8 @ 0pad + 2 float data overlap\n"
-            "vext.32  q6, q8, q9, #1     @ 0012\n"
-            "vext.32  q7, q8, q9, #2     @ 1234\n" MID_COMPUTE_S1 MID_RESULT_S1_RELU
-            "cmp  %[remain], #1             \n"
-            "blt 0f                         \n" RIGHT_COMPUTE_S1 RIGHT_RESULT_S1_RELU
-            "0:                         \n"
-            : [dout_ptr1] "+r"(doutr0),
-              [dout_ptr2] "+r"(doutr1),
-              [din0_ptr] "+r"(din_ptr0),
-              [din1_ptr] "+r"(din_ptr1),
-              [din2_ptr] "+r"(din_ptr2),
-              [din3_ptr] "+r"(din_ptr3),
-              [cnt] "+r"(cnt),
-              [rmask] "+r"(rmask_ptr),
-              [vmask] "+r"(vmask_ptr)
-            : [wr0] "w"(wr0),
-              [wr1] "w"(wr1),
-              [wr2] "w"(wr2),
-              [bias_val] "r"(bias_val),
-              [vzero] "w"(vzero),
-              [remain] "r"(remain)
-            : "cc",
-              "memory",
-              "q4",
-              "q5",
-              "q6",
-              "q7",
-              "q8",
-              "q9",
-              "q10",
-              "q11",
-              "q12",
-              "q13",
-              "q14",
-              "q15");
+        asm volatile(INIT_S1
+                     "sub %[din0_ptr], #8 @ 0pad + 2 float data overlap\n"
+                     "sub %[din1_ptr], #8 @ 0pad + 2 float data overlap\n"
+                     "sub %[din2_ptr], #8 @ 0pad + 2 float data overlap\n"
+                     "sub %[din3_ptr], #8 @ 0pad + 2 float data overlap\n"
+                     "vext.32  q6, q8, q9, #1     @ 0012\n"
+                     "vext.32  q7, q8, q9, #2     @ 1234\n" MID_COMPUTE_S1
+                     MID_RESULT_S1_RELU
+                     "cmp  %[remain], #1             \n"
+                     "blt 0f                         \n" RIGHT_COMPUTE_S1
+                         RIGHT_RESULT_S1_RELU
+                     "0:                         \n"
+                     : [dout_ptr1] "+r"(doutr0),
+                       [dout_ptr2] "+r"(doutr1),
+                       [din0_ptr] "+r"(din_ptr0),
+                       [din1_ptr] "+r"(din_ptr1),
+                       [din2_ptr] "+r"(din_ptr2),
+                       [din3_ptr] "+r"(din_ptr3),
+                       [cnt] "+r"(cnt),
+                       [rmask] "+r"(rmask_ptr),
+                       [vmask] "+r"(vmask_ptr)
+                     : [wr0] "w"(wr0),
+                       [wr1] "w"(wr1),
+                       [wr2] "w"(wr2),
+                       [bias_val] "r"(bias_val),
+                       [vzero] "w"(vzero),
+                       [remain] "r"(remain)
+                     : "cc",
+                       "memory",
+                       "q4",
+                       "q5",
+                       "q6",
+                       "q7",
+                       "q8",
+                       "q9",
+                       "q10",
+                       "q11",
+                       "q12",
+                       "q13",
+                       "q14",
+                       "q15");
        dout_ptr += 2 * w_out;
      }  //! end of processing mid rows
 #endif

--- a/lite/backends/arm/math/conv3x3s2p01_depthwise_fp32_relu.cc
+++ b/lite/backends/arm/math/conv3x3s2p01_depthwise_fp32_relu.cc
@@ -1838,7 +1838,7 @@ void conv_depthwise_3x3s2p0_bias_no_relu(float* dout,
            MID_COMPUTE_S2 MID_RESULT_S2
            "cmp %w[remain], #1                           \n"
            "blt 4f                                     \n" RIGHT_COMPUTE_S2
-                 RIGHT_RESULT_S2 "4:                                          \n"
+                RIGHT_RESULT_S2 "4:                                          \n"
            : [inptr0] "+r"(din0_ptr),
              [inptr1] "+r"(din1_ptr),
              [inptr2] "+r"(din2_ptr),