- 03 7月, 2020 1 次提交
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由 Bin Meng 提交于
SYSRESET uclass driver already provides all the reset APIs, hence exclude our own ad-hoc reset.c implementation. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NSagar Kadam <sagar.kadam@sifive.com> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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- 02 7月, 2020 6 次提交
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由 Bin Meng 提交于
Starting from OpenSBI v0.7, the SBI firmware inserts/fixes up the reserved memory node for PMP protected memory regions. All RISC-V boards need to copy the reserved memory node from the device tree provided by the firmware to the device tree used by U-Boot. Turn on CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Reviewed-by: NRick Chen <rick@andestech.com>
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由 Bin Meng 提交于
The FDT blob might not have sufficient space to hold a copy of reserved memory node. Expand it before the copy. Reported-by: NRick Chen <rick@andestech.com> Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Reviewed-by: NRick Chen <rick@andestech.com>
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由 Bin Meng 提交于
The copy of reserved memory node from source dtb to destination dtb can be avoided if they point to the same place. This is useful when OF_PRIOR_STAGE is used. Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com>
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由 Bin Meng 提交于
Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Bin Meng 提交于
Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NPragnesh Patel <pragnesh.patel@sifive.com>
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由 Sean Anderson 提交于
Signed-off-by: NSean Anderson <seanga2@gmail.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Reviewed-by: NBin Meng <bin.meng@windriver.com>
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- 01 7月, 2020 1 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for UEFI sub-system for efi-2020-07-rc6 (2) Fix an incorrect update of the GD register in efi_get_variable_common(). Fix an incorrect check for an FDT reg property. Fix a device tree used for Python testing.
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- 30 6月, 2020 3 次提交
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由 Bin Meng 提交于
test_efi_fit tests fail on RISC-V currently. This is due to the RISC-V arch_fixup_fdt() checks the #size-cells of the root node in order to correctly fix up the reserved memory node. Per the DT binding, the /reserved-memory node requires both <#address-cells> and <#size-cells> and they should use the same values as the root node. For the root node, it's not very useful if <#size-cells> is zero. Update #size-cells to 1 so tests can pass. Signed-off-by: NBin Meng <bin.meng@windriver.com>
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由 Heinrich Schuchardt 提交于
With commit 0d7c2913 ("cmd: bootefi: Honor the address & size cells properties correctly") addr was replaced by fdt_addr. But not in the check against FDT_ADDR_T_NONE. Fixes: 0d7c2913 ("cmd: bootefi: Honor the address & size cells properties correctly") Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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https://gitlab.denx.de/u-boot/custodians/u-boot-video由 Tom Rini 提交于
- fix "Synchronous Abort" when using rk3399 4K HDMI
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- 29 6月, 2020 2 次提交
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由 Anatolij Gustschin 提交于
3480 is not valid XRES, use 3840 as default. Fixes: 05c65a82 ("video: rockchip: Support 4K resolution for rk3399, HDMI") Signed-off-by: NAnatolij Gustschin <agust@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
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由 Heinrich Schuchardt 提交于
efi_get_variable_common() does not use EFI_ENTRY(). So we should not use EFI_EXIT() either. Fixes: 767f6eeb ("efi_loader: variable: support variable authentication") Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 28 6月, 2020 11 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-video由 Tom Rini 提交于
- fix logo on mx6ul_14x14_evk with DM_VIDEO enabled - fix banner string overwriting the logo on small displays - fix splash warning when building for ARM64 - fix STM32 DSI driver to probe only on supported hardware - fix memory corruption with DSI panel drivers
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- rk3188 cpu init and APLL fix; - rk3399: Add BOOTENV_SF command; - rk3288 correct vop0 vop1 setting;
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由 Patrick Wildt 提交于
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or vop1, but so far we have set it in both conditions, which is not correct. Can someone verify this is the correct way round? vop1 -> set, vop0 -> clear? Signed-off-by: NPatrick Wildt <patrick@blueri.se> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Yannick Fertre 提交于
Fill characteristics of DSI data link to platform data instead of mipi device to avoid memory corruption. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Yannick Fertre 提交于
Fill characteristics of DSI data link to platform data instead of mipi device to avoid memory corruption. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Yannick Fertre 提交于
Copy the DSI data link characteristics from panel platform data to mipi DSI device. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Yannick Fertre 提交于
Add new fields "lanes, format & mode_flags" to structure mipi_dsi_panel_plat. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com>
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由 Yannick Fertre 提交于
Check the hardware version of DSI. Versions 1.30 & 1.31 are only supported. Signed-off-by: NYannick Fertre <yannick.fertre@st.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com> Reviewed-by: NPhilippe Cornu <philippe.cornu@st.com>
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由 Ye Li 提交于
Get below warning on ARM64 platform, because the bmp_load_addr is defined to u32. common/splash.c: In function ‘splash_video_logo_load’: common/splash.c:74:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 74 | memcpy((void *)bmp_load_addr, bmp_logo_bitmap, Signed-off-by: NYe Li <ye.li@nxp.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
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由 Ye Li 提交于
Fix the bug that multiple lines wraps to overwrite logo bmp display. Signed-off-by: NYe Li <ye.li@nxp.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
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由 Ye Li 提交于
Update video bmp code so that we can display 8 bits logo on 24 or 32 bpp framebuffer. Signed-off-by: NYe Li <ye.li@nxp.com> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
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- 27 6月, 2020 3 次提交
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由 Alexander Kochetkov 提交于
The commit 84a6a27a ("rockchip: rk3188: init CPU freq in clock driver") changed ARM clock from 600MHz to 1600MHz. It made boot unstable due to the fact that PMIC at the start generates insufficient voltage for operation. See also: commit f4f57c58 ("rockchip: rk3188: Setup the armclk in spl"). Fixes commit 84a6a27a ("rockchip: rk3188: init CPU freq in clock driver"). Signed-off-by: NAlexander Kochetkov <al.kochet@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Alexander Kochetkov 提交于
Move the setting for noc remap out of SPL code. Changing noc remap inside SPL results in breaking back to BROM boot. Fixes commit c14fe2a8 ("rockchip: rk3188: Move SoC one time setting into arch_cpu_init()"). Signed-off-by: NAlexander Kochetkov <al.kochet@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Jagan Teki 提交于
Add missing BOOTENV_SF command in rk3399 config. Fix it. Fixes: f263b860 ("rk3399: Enable SF distro bootcmd") Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reported-by: NSuniel Mahesh <sunil@amarulasolutions.com> Tested-by: NSuniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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- 26 6月, 2020 3 次提交
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https://github.com/lftan/u-boot由 Tom Rini 提交于
- arm: socfpga: misc_s10: Fix EMAC register address calculation
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由 Ley Foon Tan 提交于
Fix EMAC register address calculation, address need to multiply with sizeof(u32) or 4. This fixes write to invalid address. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for UEFI sub-system for efi-2020-07-rc6 Corrections for variable definitions are provided: * Correct size of secure boot related UEFI variables. * Do not use int for storing an enum. * Replace fdt_addr by fdt_size where needed.
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- 25 6月, 2020 1 次提交
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由 Fabio Estevam 提交于
Since commit: commit 6333cbb3 Author: Michael Walle <michael@walle.cc> Date: Thu May 7 00:11:58 2020 +0200 phy: atheros: ar8035: remove static clock config We can configure the clock output in the device tree. Disable the hardcoded one in here. This is highly board-specific and should have never been enabled in the PHY driver. If bisecting shows that this commit breaks your board it probably depends on the clock output of your Atheros AR8035 PHY. Please have a look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set "clk-out-frequency = <125000000>" because that value was the hardcoded value until this commit. Signed-off-by: NMichael Walle <michael@walle.cc> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> , the clock output setting for the AR803x driver is removed from being hardcoded in the PHY driver and should be passed via device tree instead. Update the device tree with the "qca,clk-out-frequency" property so that Ethernet can work again. Reported-by: NSoeren Moch <smoch@web.de> Signed-off-by: NFabio Estevam <festevam@gmail.com> Tested-by: NSoeren Moch <smoch@web.de>
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- 24 6月, 2020 9 次提交
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由 Heinrich Schuchardt 提交于
The variables SetupMode, AuditMode, DeployedMode are explicitly defined as UINT8 in the UEFI specification. The type of SecureBoot is UINT8 in EDK2. Use variable name secure_boot instead of sec_boot for the value of the UEFI variable SecureBoot. Avoid abbreviations in function descriptions. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Variable efi_secure_mode is meant to hold a value of enum efi_secure_mode. So it should not be defined as int but as enum efi_secure_mode. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Bin Meng 提交于
Variable fdt_size should be of type 'fdt_size_t', not 'fdt_addr_t'. Fixes 0d7c2913: ("cmd: bootefi: Honor the address & size cells properties correctly") Signed-off-by: NBin Meng <bin.meng@windriver.com> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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https://gitlab.denx.de/u-boot/custodians/u-boot-mmc由 Tom Rini 提交于
- Fix fsl_esdhc_imx tunning mask - Disable CMD CRC for normal tuning for fsl_esdhc_imx - Retry CM1 until emmc ready - Fix sdhci HISPD handling - Cache-aligned extcsd reading
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由 Jagan Teki 提交于
SDHCI HISPD bits need to be configured based on desired mmc timings mode and some HISPD quirks. So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. Linux handle the HISPD similar like this in below commit but no SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") This eventually fixed the mmc write issue observed in rk3399 sdhci controller. Bug log for refernece, => gpt write mmc 0 $partitions Writing GPT: mmc write failed ** Can't write to device 0 ** ** Can't write to device 0 ** error! Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Peng Fan <peng.fan@nxp.com> Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Haibo Chen 提交于
According to eMMC specification v5.1 section 6.4.3, we should issue CMD1 repeatedly in the idle state until the eMMC is ready even if mmc_send_op_cond() send CMD1 with argument = 0. Otherwise some eMMC devices seems to enter the inactive mode after mmc_complete_op_cond() issued CMD0 when the eMMC device is busy. Signed-off-by: NHaibo Chen <haibo.chen@nxp.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com>
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由 Haibo Chen 提交于
In current code, we add 1ms dealy after each tuning command for standard tuning method. Adding this 1ms dealy is because USDHC default check the CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning IC logic do not wait for the tuning data sending out by the card, trigger the buffer read ready interrupt immediately, and step to next cycle. So when next time the new tuning command send out by USDHC, card may still not send out the tuning data of the upper command,then some eMMC cards may stuck, can't response to any command, block the whole tuning procedure. If do not check the CMD CRC for tuning, then do not has this issue. USDHC will wait for the tuning data of each tuning command and check them. If the tuning data pass the check, it also means the CMD line also okay for tuning. So this patch disable the CMD CRC check for tuning, save some time for the whole tuning procedure. Signed-off-by: NHaibo Chen <haibo.chen@nxp.com>
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由 Haibo Chen 提交于
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is TUNING_START_TAP, bit[7] of this register is to disable the command CRC check for standard tuning. So fix it here. Fixes: fa33d207 ("mmc: split fsl_esdhc driver for i.MX") Signed-off-by: NHaibo Chen <haibo.chen@nxp.com>
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由 Marek Vasut 提交于
The extcsd read target must be cache aligned in case the controller uses DMA to read the extcsd register, make it so. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NMichael Trimarchi <michael@amarulasolutions.com>
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