Add a sandbox CPU driver, and some tests for the CPU uclass.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add a method to probe all CPUs of the board.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Documentation in cpu.h is not in kernel-doc format. Change it to comply
with it.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.

Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: NSimon Glass <sjg@chromium.org>

The documentation in init.h is not in kernel-doc format. Fix this.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Includes should be sorted.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add a timer driver for the MPC83xx architecture.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Makefile entries should be sorted.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add a clock driver for the MPC83xx architecture.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add a sysreset driver for the MPC83xx platform.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add some tests for sysreset_get_status.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).

As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add a RAM driver for the MPC83xx architecture.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Imply CONFIG_BITREVERSE for Sandbox.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Sandbox is not a real bootloader and it does require
a position independent code to be supported.

Thus, build it with -fPIC explicitly.

Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: NSimon Glass <sjg@chromium.org>
Tested-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

This patch adds mcf5441x eSDHC support for the mcf5441x family.
Signed-off-by: NAngelo Dureghello <angelo@sysam.it>

On a
	u32 val = __sw32(*addr);

multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.
Signed-off-by: NAngelo Dureghello <angelo@sysam.it>

Signed-off-by: NAngelo Dureghello <angelo@sysam.it>

The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>

Drop the macro as it is never used and it collides with sh_eth.h macros.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Drop the macro as it is defined in sh7723.h already.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.

This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.
Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>

Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.
Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>

Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory.  This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"
Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>