提交 35704697 编写于 作者: D Dalon Westergreen 提交者: Marek Vasut

arm: socfpga: stratix10: add CONFIG_SPL_TARGET

Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory.  This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"
Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
上级 2ff60af6
......@@ -202,6 +202,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
* 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
*
*/
#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex"
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
......
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