add burn-in tests for TRAB board

* Enable instruction cache on MPC5200 board

  - allow for longer timeouts for USB mass storage devices

* Patch by Denis Peter, 11 Sep 2003:
  - fix USB data pointer assignment for bulk only transfer.
  - prevent to display erased directories in FAT filesystem.

* Change output format for NAND flash - make it look like for other
  memory, too

  add FAT support for IDE, SCSI and USB

* Patches by Gleb Natapov, 2 Sep 2003:
  - cleanup of POST code for unsupported architectures
  - MPC824x locks way0 of data cache for use as initial RAM;
    this patch unlocks it after relocation to RAM and invalidates
    the locked entries.

* Patch by Gleb Natapov, 30 Aug 2003:
  new I2C driver for mpc107 bridge. Now works from flash.

* Patch by Dave Ellis, 11 Aug 2003:
  - JFFS2: fix typo in common/cmd_jffs2.c
  - JFFS2: fix CFG_JFFS2_SORT_FRAGMENTS option
  - JFFS2: remove node version 0 warning
  - JFFS2: accept JFFS2 PADDING nodes
  - SXNI855T: add AM29LV800 support
  - SXNI855T: move environment from EEPROM to flash
  - SXNI855T: boot from JFFS2 in NOR or NAND flash

* Patch by Bill Hargen, 11 Aug 2003:
  fixes for I2C on MPC8240
  - fix i2c_write routine
  - fix iprobe command
  - eliminates use of global variables, plus dead code, cleanup.

  (tested with USB memory sticks only)

* Avoid flicker on TRAB's VFD

* Add PCI support for SL8245 board

* Support IceCube board configurations with 1 x AMD AM29LV065 (8 MB)
  or 1 x AM29LV652 (two LV065 in one chip = 16 MB);
  Run IPB at 133 Mhz; adjust the MII clock frequency accordingly

* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16  MHz)
  to allow for more accurate baudrate settings
  (error now 0.7% at 115 kbps, instead of 3.5% before)

* Patch by Andreas Mohr, 4 Sep 2003:
  Fix a lot of spelling errors

* Add support for P3G4 board

* Fix problem with MGT5100 FEC driver: add "early" MAC address
  initialization

According to the MPC8260 User's Manual, PCI_MODE signal should be
reflected in SCCR register, and local bus pins configuration is taken
from HRCW and appears in SIUMCR. For some reason it does not work
this way, so the only possibility to detect if the board is
configured in PCI mode is to check the BCSR. This patch sets SCCR and
SIUMCR according to the BCSR.

add support for Adder II MPC852T module

  fix TI Innovator/OMAP1510 pin configs

* Patches by Kshitij, 18 Aug 2003
  - add support for arm926ejs cpu core
  - add support for TI OMAP 1610 Innovator Board

add support for bzip2 uncompression

(because of better response to iprobe command); fix problem with
"reset" command

* Fix RAM size detection for RMU board

* Implement "reset" for MGT5100/MPC5200 systems

  allow selection of clock frequency as "make" target

* Implement memory autosizing code for IceCube boards

* Configure network port on INCA-IP for autonegotiation

* Fix overflow problem in network timeout code

* Patch by Richard Woodruff, 8 Aug 2003:
  Allow crc32 to be used at address 0x000 (crc32_no_comp, too).

disable clocks_in_mhz, enable boot count limit

in toplevel directory instead.  Removed astest.c from tools/gdb because
it is no longer relevant.

Fix MPC5200 FEC driver

in toplevel directory instead.  Removed astest.c from tools/gdb because
it is no longer relevant.

* Patch by Brad Parker, 02 Aug 2003:
  fix sc520_cdp problems

* Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements)

* Allow erase command to cross flash bank boundaries