- 31 5月, 2017 11 次提交
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由 Patrick Wildt 提交于
Switch Clearfog to the generic distro defaults. This has been taken from a Debian mailing list thread: https://lists.debian.org/debian-boot/2016/10/msg00026.htmlSigned-off-by: NPatrick Wildt <patrick@blueri.se> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Patrick Wildt 提交于
Use GPIO19 which is wired to the uSOM phy reset signal in order to reset the uSOM's 1512 Gigabit Ethernet phy. This GPIO is valid on ClearFog rev 2.1 and newer. Taken from SolidRun's specialised u-boot, see https://github.com/SolidRun/u-boot-armada38x/commit/f906e3df172e07ac82cdd87b278d7896949262eaSigned-off-by: NPatrick Wildt <patrick@blueri.se> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
The dram_init and dram_init_banksize functions were using a board specific implementation for decoding the memory banks from the fdt. This change makes the dram_init* functions use a generic implementation of decoding and populating memory bank and size data. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Nathan Rossi <nathan@nathanrossi.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting the correct PHY type (KR / SFI) for the COMPHY driver and enabling the ethernet0 device node in the dts. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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由 Stefan Roese 提交于
This patch enable the PINCTRL and GPIO support, including the GPIO command on the Armada 3720 DB. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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由 Stefan Roese 提交于
To enable support for the Armada 37xx pinctrl driver, we need to change the Kconfig symbol for the Armada 7k/8k pinctrl driver and its dependencies to distinguish between both platforms and drivers. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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由 Gregory CLEMENT 提交于
GPIO management is pretty simple and is part of the same IP than the pin controller for the Armada 37xx SoCs. This patch adds the GPIO support to the pinctrl-armada-37xx.c file, it also allows sharing common functions between the gpio and the pinctrl drivers. Ported to U-Boot based on the Linux version by Stefan Roese. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NStefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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由 Gregory CLEMENT 提交于
The Armada 37xx SoC come with 2 pin controllers: one on the south bridge (managing 28 pins) and one on the north bridge (managing 36 pins). At the hardware level the controller configure the pins by group and not pin by pin. This constraint is reflected in the design of the driver: only the group related functions are implemented. Ported to U-Boot based on the Linux version by Stefan Roese. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NStefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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由 Gregory CLEMENT 提交于
Start to populate the device tree of the Armada 37xx with the pincontrol configuration used on the board providing a dts. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NStefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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由 Gregory CLEMENT 提交于
Add the nodes for the two pin controller present in the Armada 37xx SoCs. Initially the node was named gpio1 using the same name that for the register range in the datasheet. However renaming it pinctr_nb (nb for North Bridge) makes more sens. Minor changes for U-Boot because of the slightly different dts version done by Stefan Roese. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NStefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
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- 29 5月, 2017 6 次提交
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由 Philipp Tomsich 提交于
Adding documentation on the new config properties: 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Philipp Tomsich 提交于
This introduces the ability to override the environment offets from the device tree by setting the following nodes in '/config': 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND To keep with the previous logic, the CONFIG_* defines still need to be available and the statically defined values become the defaults, when the corresponding properties are not set in the device-tree. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Keerthy 提交于
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask. Source: http://www.ti.com/lit/ds/symlink/tps65218.pdfSigned-off-by: NKeerthy <j-keerthy@ti.com> Fixes: 86db550b ("power: Add support for the TPS65218 PMIC") Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Heiner Kallweit 提交于
Number of blocks is a 9 bit field where 0 stands for a unlimited number of blocks. Therefore the max number of blocks which can be set is 511. Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
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由 Tom Rini 提交于
Inside of max77686_buck_volt2hex/max77686_buck_hex2volt/max77686_ldo_volt2hex we check that the value we calculate is >= 0 however we declare 'hex' as unsigned int making these always true. Mark these as 'int' instead. We also move hex_max to int as they are constants that are 0x3f/0xff. Given that the above functions are marked as returning an int, make the variables we assign their return value to also be int to be able to catch the error condition now. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
In some places we check if part_config is set to MMCPART_NOAVAILABLE (0xff). With part_config being a char this is always false. We should be using a u8 to store this value instead, after a quick consultation with the Linux Kernel. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 26 5月, 2017 2 次提交
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git://git.denx.de/u-boot-nds32由 Tom Rini 提交于
Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: NTom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
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- 24 5月, 2017 17 次提交
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由 Udit Agarwal 提交于
This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Santan Kumar 提交于
This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSuresh Gupta <suresh.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS flag is enabled. In case QIXIS code is not enabled, use default sysclk value as 100MHz per board documentation. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Yogesh Gaur 提交于
Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: NPriyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 York Sun 提交于
This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: NYork Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: NMingkai Hu <mingkai.hu@nxp.com>
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由 York Sun 提交于
This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: NYork Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: NMingkai Hu <mingkai.hu@nxp.com>
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由 Suresh Gupta 提交于
LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: NSuresh Gupta <suresh.gupta@nxp.com>
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由 Suresh Gupta 提交于
ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: NSuresh Gupta <suresh.gupta@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Priyanka Jain 提交于
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator which needs to be programmed to enable high speed SD interface by setting GPIO4_10 output to zero. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NSantan Kumar <santan.kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Hou Zhiqiang 提交于
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 23 5月, 2017 4 次提交
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由 rick 提交于
Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: Nrick <rick@andestech.com>
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由 Tom Rini 提交于
In situations like an autobuilder we are likely to not have bl31.bin present and thus would fail to build and propagate the error upwards. Instead, print a big warning to stderr so that human will see that something is wrong but complete the build. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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git://git.denx.de/u-boot-sunxi由 Tom Rini 提交于
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't get Kconfig errors on platforms without SPL, ie sandbox (without SPL). Signed-off-by: NTom Rini <trini@konsulko.com>
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