Add support for storing the environment in CFI NOR flash on Juno and FVP
models.

I also removed some config values that are not used by CFI flash parts.

Juno has 1 flash part with 259 sectors.  The first 255 sectors are
0x40000 (256kb) and are followed by 4 sectors of 0x10000 (64KB).

FVP models simulate a 64MB NOR flash part at base address 0x0FFC0000.
This part has 256 x 256kb sectors.  We use the last sector to store the
environment.

To save the NOR flash to a file, the following parameters should be
passed to the model:

    -C bp.flashloader1.fname=${FILENAME}
    -C bp.flashloader1.fnameWrite=${FILENAME}

Foundation models don't simulate the NOR flash, but having NOR support
in the u-boot binary does not harm:  attempting to write to the NOR will
fail gracefully.
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

This patch allows vexpress64 targets to be compiled when
CONFIG_SYS_FLASH_CFI is enabled.

I considered using #warning instead of #error, but this just clutters up
the build output and hides real warnings.

Without this patch, you see errors during compilation like this:

include/configs/vexpress_aemv8a.h:42:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
include/configs/vexpress_aemv8a.h:115:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
include/configs/vexpress_aemv8a.h:280:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
make[1]: *** [tools/envcrc.o] Error 1
make: *** [tools] Error 2
In file included from include/config.h:5:0,
                 from tools/envcrc.c:19:
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:

    commit 2d0cee1c
    Author: Liviu Dudau <Liviu.Dudau@foss.arm.com>
    Date:   Mon Oct 19 11:08:31 2015 +0100

    vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

    Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
    Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: NLiviu Dudau <Liviu.Dudau@foss.arm.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NRyan Harkin <ryan.harkin@linaro.org>
Tested-by: NRyan Harkin <ryan.harkin@linaro.org>

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLiviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.
Signed-off-by: NRyan Harkin <ryan.harkin@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NRyan Harkin <ryan.harkin@linaro.org>

Cosmetic fixes to the file, make it checkpatch clean.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add additional parameter into the eeprom command to select
the I2C bus on which the eeprom resides.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add bus argument to eeprom_init(), so that it can select
the I2C bus number on which the eeprom resides. Any negative
value of the $bus argument will preserve the old behavior.
This is in place so that old code does not randomly break.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>
[trini: Wrap i2c_set_bus_num() call with CONFIG_SYS_I2C test]
Signed-off-by: NTom Rini <trini@konsulko.com>

Unify the code for doing read/write into single function, since the
code for both the read and write is almost identical. This again
trims down the code duplication.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull out the code which computes the length of the transfer
into separate code and clean it up a little. This again trims
down the code duplication.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Implement default value of 8 for this macro and pull out all of
this macro out of the code. The default value of 8 actually does
implement exactly the same behavior as the previous code which
was in the #else clause of the ifdef.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Just suck the ugly ifdef around eeprom_init() call into eeprom_init()
function itself. This puts all of the ifdef mess into one place.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull this macro to the beginning of the cmd_eeprom.c and remove
another nasty ifdef from the code. Note that this is legal, since
udelay(0) changes the behavior only such that it pings the WDT if
WDT is enabled and otherwise does not wait.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Make this function weak and implement it's weak implementation
so that the boards can just reimplement it. This zaps the horrid
CONFIG_SYS_EEPROM_WREN macro.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull out the code computing the EEPROM address into separate function
so that it's not duplicated.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Pull out the code which does the I2C or SPI read/write, so that
the beefy ifdef around it is contained in a single function.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

This macro is no longer used, so just reap it.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Remove this function as it's no longer used.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Now that the only user of CONFIG_SYS_EEPROM_X40430 was removed,
remove this unused code from cmd_eeprom.c
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

This option only complicates the code unnecessarily, just use
CONFIG_SYS_DEF_EEPROM_ADDR as the default address if there are
only five arguments to eeprom {read/write} if this is defined.
If CONFIG_SYS_DEF_EEPROM_ADDR is not defined, we mandate all
six arguments.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Just move the code around so that the forward declarations are not
necessary. Also zap a few checkpatch issues where applicable and
zap the use of #ifdef CONFIG_CMD_EEPROM in the code, since this is
always true.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

This rewrite uses lately promoted eeprom_init(int) function to choose the
right I2C bus when writing data to the EEPROM.
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

The NOR flash on Keystone 2 evms has a u-boot-spl partition size of
0x80000.

Currently burn_uboot_spi will erase 0x100000 from the spi NOR which will
cause a partial erase of the misc partition.

Fix this by correcting the erase size.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>

The WAKEUP_X pins are always an input no matter the pinmux mode.
However, the 18th bit that typical configures a pin as an input is
considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP
pin remove any configuration that sets that pin as an input. Since
those pins are only inputs remove any output configuration from those
pins.
Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>

Change to ns16550 uart for 10m50 devboard based on a new
Altera release.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>

Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers
is completed.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Unify serial_omap, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Unify serial_tegra, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Unify serial_dw, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Unify serial_keystone, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Unify serial_rockchip, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Tested-by: NAriel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: NSimon Glass <sjg@chromium.org>

Unify serial_ppc, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
[trini: Add TODO comment]
Signed-off-by: NTom Rini <trini@konsulko.com>

Unify serial_x86, and use the generic binding.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Add generic binding to unify ns16550 drivers. There are
several drivers using almost the same code, such as serial_dw,
serial_keystone, serial_omap, serial_ppc, serial_rockchip,
serial_tegra.c, and serial_x86. But each is platform specific.

The key difference between these drivers is the way to get
input clock frequency. With this unified approach, fixed clock
frequency should be extracted from "clock-frequency" property of
device tree blob. If this property is not available, the macro
CONFIG_SYS_NS16550_CLK will be used. It can be a constant or a
function to get clock, eg, get_serial_clock().
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Acked-by: NSimon Glass <sjg@chromium.org>

Change map_sysmem() to map_physmem(,,MAP_NOCACHE). Though map_sysmem()
can be used to map system memory, it might be wrong to use it for I/O
ports.  The map_physmem() serves the same purpose to translate physical
address to virtual address with the additional flag to take care of cache
property. Most drivers use map_physmem() since I/O ports access should be
uncached. As ns16550 is a driver, it should use map_physmem() rather
than map_sysmem().
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Acked-by: NSimon Glass <sjg@chromium.org>

Since commit 220e8021 ("nios2: convert altera_jtag_uart to
driver model"), the default debug uart was changed. Most people
use ns16550 UART, so restore it as default.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reported-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar>
Reported-by: NAriel D'Alessandro <ariel@vanguardiasur.com.ar>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Acked-by: NSimon Glass <sjg@chromium.org>

Add a README with a brief guide to porting serial drivers over to use
driver model.

Add a timeline also. All serial drivers should be converted by the end
of January 2016.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add a test that verifies that USB keyboards work correctly on sandbox.
This verifies some additional parts of the USB stack.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Enable the USB keyboard on sandbox, now that we have a suitable emulation
driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>