提交 4fb60552 编写于 作者: T Thomas Chou 提交者: Tom Rini

ns16550: zap CONFIG_NS16550_SERIAL

Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers
is completed.
Signed-off-by: NThomas Chou <thomas@wytron.com.tw>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>
上级 c7b9686d
......@@ -3,7 +3,6 @@ CONFIG_VENDOR_EFI=y
CONFIG_DEFAULT_DEVICE_TREE="efi"
CONFIG_TARGET_EFI=y
CONFIG_TSC_CALIBRATION_BYPASS=y
# CONFIG_NS16550_SERIAL is not set
# CONFIG_CMD_BOOTM is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
......
......@@ -186,18 +186,6 @@ config ALTERA_UART
Select this to enable an UART for Altera devices. Please find
details on the "Embedded Peripherals IP User Guide" of Altera.
config NS16550_SERIAL
bool "NS16550 UART or compatible"
depends on DM_SERIAL
default y if X86 || PPC || ARCH_ROCKCHIP
help
Support NS16550 UART or compatible with driver model. This can be
enabled in the device tree with the correct input clock frequency.
If the input clock frequency is not defined in the device tree,
the macro CONFIG_SYS_NS16550_CLK defined in a legacy board header
file will be used. It can be a constant or a function to get clock,
eg, get_serial_clock().
config SANDBOX_SERIAL
bool "Sandbox UART support"
depends on SANDBOX
......
......@@ -404,7 +404,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
plat->base = addr;
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 1);
#ifdef CONFIG_NS16550_SERIAL
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"clock-frequency",
CONFIG_SYS_NS16550_CLK);
......@@ -412,7 +411,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
debug("ns16550 clock not defined\n");
return -EINVAL;
}
#endif /* CONFIG_NS16550_SERIAL */
return 0;
}
......@@ -425,7 +423,6 @@ const struct dm_serial_ops ns16550_serial_ops = {
.setbrg = ns16550_serial_setbrg,
};
#ifdef CONFIG_NS16550_SERIAL
#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id ns16550_serial_ids[] = {
{ .compatible = "ns16550" },
......@@ -454,5 +451,4 @@ U_BOOT_DRIVER(ns16550_serial) = {
.probe = ns16550_serial_probe,
.ops = &ns16550_serial_ops,
};
#endif /* CONFIG_NS16550_SERIAL */
#endif /* CONFIG_DM_SERIAL */
......@@ -27,8 +27,6 @@
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#else
#define CONFIG_NS16550_SERIAL
#endif
/* I2C Configuration */
......
......@@ -18,7 +18,6 @@
#include <asm/arch/omap.h>
/* Serial support */
#define CONFIG_NS16550_SERIAL
#define CONFIG_DM_SERIAL
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
......
......@@ -39,10 +39,6 @@
/*
* NS16550 Configuration
*/
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
#define CONFIG_NS16550_SERIAL
#endif
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
......
......@@ -49,7 +49,6 @@
/*
* NS16550 Configuration
*/
#undef CONFIG_NS16550_SERIAL
#undef CONFIG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
......
......@@ -196,9 +196,7 @@
*/
#ifndef CONFIG_SPL_BUILD
#define CONFIG_NS16550_SERIAL
#else
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#endif
......
......@@ -45,9 +45,7 @@
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK 24000000
#ifdef CONFIG_DM_SERIAL
# define CONFIG_NS16550_SERIAL
#else
#ifndef CONFIG_DM_SERIAL
# define CONFIG_SYS_NS16550_REG_SIZE -4
# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
......
......@@ -35,7 +35,6 @@
/*
* UART configuration
*/
#define CONFIG_NS16550_SERIAL
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 166666666
......
......@@ -39,7 +39,6 @@
/*
* NS16550 Configuration
*/
#define CONFIG_NS16550_SERIAL
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
......
......@@ -19,10 +19,6 @@
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#ifndef CONFIG_SPL_BUILD
# define CONFIG_NS16550_SERIAL
#endif
#include <asm/arch/omap.h>
/* NS16550 Configuration */
......
......@@ -63,8 +63,6 @@
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4
#else
#define CONFIG_NS16550_SERIAL
#endif
#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
......
......@@ -18,10 +18,6 @@
#include <asm/arch/cpu.h>
#include <asm/arch/omap.h>
#ifndef CONFIG_SPL_BUILD
# define CONFIG_NS16550_SERIAL
#endif
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
......
......@@ -63,8 +63,6 @@
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
#else
#define CONFIG_NS16550_SERIAL
#endif
#define CONFIG_CONS_INDEX 3
......
......@@ -55,8 +55,6 @@
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#else
#define CONFIG_NS16550_SERIAL
#endif
/*
......
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