vsprintf.h doesn't include the stdarg.h file, which means that it relies on
the files that include vsprintf.h to include stdarg.h as well.

Add an explicit include to avoid build errors when simply including that
file.
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NPantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Having dashes as a separator in the DTB name is a quite common practice.

However, the current code to generate objects from DTBs assumes the
separator is an underscore, leading to a compilation error when building a
device tree with dashes.

Replace all the dashes in the DTB name to generate the symbols name, which
should solve this issue.
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NPantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The current code only checks if the fdt subcommand is fdt addr by checking
whether it starts with 'a'.

Since this is a pretty widely used letter, narrow down that check a bit.
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NPantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This patch adds support for the BayTrail based theadorable-x86-dfi-bt700
board which uses the DFI BT700 BayTrail Qseven SoM on a custom baseboard.
The main difference to the DFI baseboard is, that it isn't equipped
with a Super IO chip and uses the internal HS SIO UART (memory mapped
PCI based) as the console UART.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This patch adds support for the DFI BayTrail BT700 QSeven SoM installed
on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton
NCT6102D Super IO chip providing the UART as console.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This patch includes the following changes:

- Remove Designware I2C support from dts as its not used
- Configure SMBus PADs in dts
- Enable I2C commands and I2C support
- Configure SMSC2513 USB hub via SMBus upon startup
- Move environment location to match Minnowmax example
- Enhancement of the default environment
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.

This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.

Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: George McCollister <george.mccollister@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This fixes incorrect filenames in cbfsls output.
Signed-off-by: NYaroslav K. <yar444@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
[clean up checkpatch errors and warnings]
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

These are not useful on x86 so do not print them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

There is no sense in printing out DRAM banks of size 0 since this means they
are empty. Skip them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Without PS/2 keyboard and mouse in the ASL file, Windows does not
see them. No problem for Linux as it probes keyboard and mouse via
the legacy 8042 I/O port.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Explicitly enable ILB_SERIRQ function 1 in
cfio_regs_pad_ilb_serirq_PCONF0.

Pad configuration for SERIRQ is not set to enable the SERIRQ function
after a reset though strangely, it is on initial boot.

Rebooting from Linux, reset command in u-boot and even pushing the reset
button on the development board all lead to the SERIRQ function being
disabled (address 0xfed0c560 with value of 0x2003cc80).
Signed-off-by: NGeorge McCollister <george.mccollister@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.
Signed-off-by: NStefan Roese <sr@denx.de>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>

To support the BayTrail internal SIO HS UART, the internal UART clock
needs to get configured. This patch adds support for this clock
configuration which will be done, if the PCI device(s) are found.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Don't just define ARCH_DMA_MINALIGN but also CONFIG_SYS_CACHELINE_SIZE
if it's undefined. This is needed for the xhci driver to compile.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This feature is not supported. Document this, and add some details on how it
might be implemented.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

UEFI is commonly used on x86. Add a reference to U-Boot's support for this
in the x86 README.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

The README indicates that this is not supported, but this is no-longer true.
Update the text to indicate this and describe the FIT changes required.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

The debug FSP image is bigger in size than the normal FSP image. This
patch adds a small description on how to use this FSP debug version
by changing CONFIG_FSP_ADDR.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Add entry for the missing internal UART defconfig to the MAINTAINERS
file.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

To prevent the compiler error, split the checking condition whether
cfg->ops is NULL or not.
It's more clearly, because it's not included in mmc_config structure
when CONFIG_DM_MMC_OPS is disabled.

drivers/mmc/mmc_legacy.c: In function ‘mmc_create’:
drivers/mmc/mmc_legacy.c:118:31: error: ‘const struct mmc_config’ has no member named ‘ops’
drivers/mmc/mmc_legacy.c:118:58: error: ‘const struct mmc_config’ has no member named ‘ops’
make[1]: *** [drivers/mmc/mmc_legacy.o] Error 1
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

When the MMC framework was added in u-boot, the mmc_go_idle was
added before mmc_send_op_cond_iter in function mmc_send_op_cond
annotating that some cards seemed to need this. Actually, we still
need to do this in function mmc_complete_op_cond for those cards.
This has been verified on Micron MTFC4GACAECN eMMC chip.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

K2G can benefit from driver model support in the
MMC/SD driver it uses: omap_hsmmc

Enable driver model MMC support for K2G.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The K2G EVM from TI has an SD card slot as
well as onboard eMMC for data storage.

Enable support for these.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

K2G SoC from TI has two MMC/SD controllers.
Add device tree data for these.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

structure member 'cd_inverted' of omap_hsmmc_data
is available only when OMAP_HSMMC_USE_GPIO is
defined.

When CONFIG_DM_MMC is defined, but not
CONFIG_OMAP_GPIO, this will cause build breakage
in omap_hsmmc driver of the sort:

  CC      drivers/mmc/omap_hsmmc.o
../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata':
../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted'
  priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted");
      ^

Fix this by accessing cd_inverted only when
OMAP_HSMMC_USE_GPIO is defined.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Now that nand_info[] is an array of pointers we need to ensure that it's
been populated prior to use.  We may for example have ENV in NAND set in
configurations that run on boards with and without NAND (where default
env is fine enough, such as omap3_beagle and beagleboard (NAND) vs
beagle xM (no NAND)).

Fixes: b616d9b0 ("nand: Embed mtd_info in struct nand_chip")
Cc: Scott Wood <oss@buserror.net>
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: NScott Wood <oss@buserror.net>

56086921 added support for unaligned environments access.
U-boot itself does not support this:
- env_nand.c fails when using an unaligned offset. It produces an
  error in nand_erase_opts{drivers/mtd/nand/nand_util.c}
- in env_sf/env_flash the unused space at the end is preserved, but
  not in the beginning. block alignment is assumed
- env_sata/env_mmc aligns offset/length to the block size of the
  underlying device. data is silently redirected to the beginning of
  a block

There is seems no use case for unaligned environment. If there is
some useful data at the beginning of the the block (e.g. end of u-boot)
that would be very unsafe. If the redundant environments are hosted by
the same erase block then that invalidates the idea of double buffering.
It might be that unaligned access was allowed in the past, and that
people with legacy u-boot are trapped. But at the time of 56086921
it wasn't supported and due to reasons above I guess it was never
introduced.
I prefer to remove that (unused) feature in favor of simplicity
Signed-off-by: NAndreas Fenkart <andreas.fenkart@digitalstrom.com>
Acked-by: NStefan Agner <stefan.agner@toradex.com>

The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.

 - Avnet Xilinx LX60
 - Avnet Xilinx LX110
 - Avnet Xilinx LX200
 - Xilinx ML605
 - Xilinx KC705

These boards share the same components (open-ethernet, ns16550 serial,
lcd display, flash, etc.).
Signed-off-by: NChris Zankel <chris@zankel.net>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

DE212 is a general purpose xtensa processor without full MMU.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

DC233C is an xtensa processor with full MMUv3 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

DC232B is an xtensa processor with full MMUv2 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: NChris Zankel <chris@zankel.net>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: NChris Zankel <chris@zankel.net>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.

This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers will be in separate commits.
Signed-off-by: NChris Zankel <chris@zankel.net>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.
Signed-off-by: NJon Medhurst <tixy@linaro.org>
Reviewed-by: NRyan Harkin <ryan.harkin@linaro.org>
Tested-by: NRyan Harkin <ryan.harkin@linaro.org>

Convert the driver to the driver model while retaining the existing
legacy code. This allows the driver to support boards that have
converted to driver model as well as those that have not.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Add device tree for SAMA5D2 Xplained board.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>