- 16 10月, 2018 1 次提交
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由 Michal Simek 提交于
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 07 10月, 2018 2 次提交
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由 Jens Wiklander 提交于
Adds configuration option OPTEE_TA_AVB and a header file describing the interface to the Android Verified Boot 2.0 (AVB) trusted application provided by OP-TEE. Tested-by: NIgor Opaniuk <igor.opaniuk@linaro.org> Reviewed-by: NIgor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: NJens Wiklander <jens.wiklander@linaro.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jens Wiklander 提交于
Adds a uclass to interface with a TEE (Trusted Execution Environment). A TEE driver is a driver that interfaces with a trusted OS running in some secure environment, for example, TrustZone on ARM cpus, or a separate secure co-processor etc. The TEE subsystem can serve a TEE driver for a Global Platform compliant TEE, but it's not limited to only Global Platform TEEs. The over all design is based on the TEE subsystem in the Linux kernel, tailored for U-Boot. Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NIgor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: NJens Wiklander <jens.wiklander@linaro.org>
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- 06 10月, 2018 1 次提交
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由 Liviu Dudau 提交于
Add support for the Arm Versatile Express config bus that is being used for exposing various subsystems via a generic configuration bus. This driver adds support for generating transactions on this configuration bus and can be used by other drivers to abstract the communication with the actual function providers. Signed-off-by: NLiviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: NHeiko Schocher <hs@denx.de>
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- 01 10月, 2018 1 次提交
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由 Ramon Fried 提交于
Add a PHY driver for the Qualcomm dragonboard 410c which allows switching on/off and resetting the phy connected to the EHCI controllers and USBHS controller. Signed-off-by: NRamon Fried <ramon.fried@gmail.com>
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- 29 9月, 2018 3 次提交
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由 Liviu Dudau 提交于
Add support for Arm Mali Display Processors DP500, DP550 and DP650. Only one layer is being used to display the console or boot logo, even if more layers are supported in the hardware. Signed-off-by: NLiviu Dudau <liviu.dudau@foss.arm.com>
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由 Liviu Dudau 提交于
Add support for the NXP TDA19988 HDMI encoder as used on the Juno development board from Arm. Signed-off-by: NLiviu Dudau <liviu.dudau@foss.arm.com>
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由 Heinrich Schuchardt 提交于
The include/video*.h files are part of the drivers in drivers/video. So it makes sense to assign them to the same maintainer. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 24 9月, 2018 3 次提交
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由 Heinrich Schuchardt 提交于
The patch implements the EFI_UNICODE_COLLATION_PROTOCOL. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Heinrich Schuchardt 提交于
This patch provides a define to initialize a table that maps lower to capital letters for Unicode code point 0x0000 - 0xffff. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Heinrich Schuchardt 提交于
Provide unit tests for Unicode functions. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 20 9月, 2018 1 次提交
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由 Miquel Raynal 提交于
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
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- 19 9月, 2018 1 次提交
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由 Marek Behún 提交于
This adds a weak definition of comphy_update_map to comphy_core, which does nothing. If this function is defined elsewhere, for example in board file, the board file can change some parameters of SERDES configuration. This is needed on Turris Mox, where the SERDES speed on lane 1 has to be set differently when SFP module is connected and when Topaz Switch module is connected. This is a temporary solution. When the comphy driver for armada-3720 will be added to the kernel, the comphy driver in u-boot shall also be updated and this should be done differently then. Signed-off-by: NMarek Behun <marek.behun@nic.cz> Signed-off-by: NStefan Roese <sr@denx.de>
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- 18 9月, 2018 6 次提交
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由 Mario Six 提交于
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on the MPC83xx architecture. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Add a CPU driver for the MPC83xx architecture. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Add a timer driver for the MPC83xx architecture. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Add a clock driver for the MPC83xx architecture. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Add a sysreset driver for the MPC83xx platform. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Add a RAM driver for the MPC83xx architecture. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMario Six <mario.six@gdsys.cc>
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- 11 9月, 2018 3 次提交
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由 Lokesh Vutla 提交于
Add support for Texas Instruments' K3 Generation Processor families. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Michal Simek 提交于
FPGA subsystem requires special care that's why it should be maintained via one tree. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Thomas Fitzsimmons 提交于
Add support for loading U-Boot on the Broadcom 7260 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: NThomas Fitzsimmons <fitzsim@fitzsim.org> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
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- 14 8月, 2018 2 次提交
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由 Patrice Chotard 提交于
Add new drivers Add Christophe Kerello and myself as maintainers Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Ramon Fried 提交于
Add scattered driver files around the source tree that belongs to Snapdragon arch. Not sure why they were not included in the first place. Signed-off-by: NRamon Fried <ramon.fried@gmail.com>
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- 11 8月, 2018 1 次提交
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由 Heinrich Schuchardt 提交于
Create separate html pages for linker lists, the serial subsystem, and the EFI subsystem. Add a table of content. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 06 8月, 2018 1 次提交
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由 Michal Simek 提交于
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files and point to origin internal board name. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 31 7月, 2018 1 次提交
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由 Eugeniy Paltsev 提交于
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 27 7月, 2018 1 次提交
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由 Tom Rini 提交于
Scott is no longer maintaining the NAND subsystem, mark as orphaned for now. Acked-by: NScott Wood <oss@buserror.net> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 25 7月, 2018 1 次提交
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由 Heinrich Schuchardt 提交于
lib/charset.c is only used by the EFI subsystem. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 20 7月, 2018 1 次提交
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由 Ramon Fried 提交于
The Shared Memory Manager driver implements an interface for allocating and accessing items in the memory area shared among all of the processors in a Qualcomm platform. Adapted from the Linux driver (4.17) Changes from the original Linux driver: * Removed HW spinlock mechanism, which is irrelevant in U-boot particualar use case, which is just reading from the smem. * Adapted from Linux driver model to U-Boot's. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 19 7月, 2018 1 次提交
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由 Michal Simek 提交于
The Linux kernel has binding for gpio-restart node. This patch is adding basic support without supporting any optional properties. This driver was tested on Microblaze system where gpio is connected to SoC reset logic. Output value is handled via gpios cells values. In gpio_reboot_request() set_value is writing 1 because dm_gpio_set_value() is capable to changing it when it is ACTIVE_LOW. ... if (desc->flags & GPIOD_ACTIVE_LOW) value = !value; ... Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 11 7月, 2018 1 次提交
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由 Thomas Fitzsimmons 提交于
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: NThomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
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- 10 7月, 2018 1 次提交
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由 Manivannan Sadhasivam 提交于
Add myself as the Maintainer for Actions Semi OWL family and its relevant board, drivers. Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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- 19 6月, 2018 1 次提交
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由 Ramon Fried 提交于
Replace Mateusz as Maintainer for ARM Snapdragon arch. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Acked-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
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- 03 6月, 2018 1 次提交
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由 Heinrich Schuchardt 提交于
With 'make htmldocs' we can generate a documentation if the function comments follow the DocBook conventions. This patch adjusts the comments for EFI boot services and provides the DocBook template for the EFI subsystem. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 01 6月, 2018 1 次提交
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由 Alexey Brodkin 提交于
As of today 'board/synopsys/' folder contains only Synopsys ARC boards supported by the same people who support 'arch/arc'. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 29 5月, 2018 1 次提交
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由 Ken Ma 提交于
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this patch moves it to drivers/ata directory with renaming "sata.c" to "ahci_mvebu.c" which is aligned to Linux. New ahci driver's kconfig option is added as AHCI_MVEBU which selects SCSI_AHCI and is based on AHCI. Signed-off-by: NKen Ma <make@marvell.com> Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NStefan Roese <sr@denx.de>
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- 27 5月, 2018 1 次提交
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由 Patrick Delaunay 提交于
Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits). Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com> Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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- 11 5月, 2018 2 次提交
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由 Michal Simek 提交于
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Alexander Graf 提交于
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by Xilinx for the Zynq platforms. Let's match them accordingly in the MAINTAINERS file. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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