Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.

The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Do gic cpu initialization based on EL level which u-boot enters.
U-Boot can't access EL3 regs when runs in EL2/EL1, etc.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Ethernet is not present on this board that's why there are two other
options how to wire the board to ethernet. The first is asix_eth usb
host converter which is already enabled by default. The second option is
to use USB CDC/RNDIS ethernet gadget.

This patch is enabling CDC which is working with Linux.
With new bind/unbind command there is no need to call usb_ether_init()
from platform code and use for example these commands:

bind /amba/usb0@ff9d0000/dwc3@fe200000 usb_ether
dhcp
unbind /amba/usb0@ff9d0000/dwc3@fe200000
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There are some inconsistencies which should be fixed.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add access to efuse for Zynq-7000S device detection.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB),
USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each).

Boards have mix of Winbond/ST QSPIs.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable loading FPGA from FIT image in SPL.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch partially reverts:
"spl: fit: Add support for loading FPGA bitstream"
(sha1: 26a64223)

There shouldn't be a need to call private spl_load_fpga_image function
because the whole sequence should be already handled by fpga framework.
If there is missing loading bistream by chunks it should be done via
fpga framework instead of having private hooks.
Also spl_load_fpga_image() weak function is not used anywhere and
opening a way for not reviewed hacks out of mainline U-Boot is not the
right way to go.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

This reverts commit c35a7d37.
This commit is breaking SPL on zc706.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: Patrice Chotard <patrice.chotard@st.com> [on STM32F746-disco]

More fixes and improvements for ARC here:

Fixes (this time included for real):
 * Take care of global uninitialized variables
   They used to be put right after .bss section and were never
   zeroed as they should be. Now merged with normal .bss

Improvements:
 * Print more verbose CPU info for boards built on real silicon
 * Add support for SD-card detection on all ARC boards
 * Quite a few fixes for IoT DK
   - Support reset by command
   - Print of CPU freq on boot
   - Link for eFlash etc

By default GCC puts global non-initialized variables in COMMON section.
And we used to ignore existence of COMMON section in our linker
scripts though smart LD silently appended it right after .bss.

And the problem here is variables from COMMON section even though
require zeroing in run-time were not zeroed as they were placed
right after __bss_end symbol.

It was a pure luck we never faced serious problem due to this,
but now it is fixed.

Now as for some other architectures we'll just force GCC to put
those global variables in normal .bss section.

This solution is much nicer than adding COMMON section to each and
every linker script.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

[trini: Convert da850evm_nand defconfig now to to SPL_DM]
Signed-off-by: NTom Rini <trini@konsulko.com>

That's what we'll have in production.
But note it won't work for loading via JTAG as
eFlash is not directly writable, one needs to use
prebootloader to flash uboot.bin from SD-card into eFlash.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

So now we may detect MMC/SD-card existence and
instead of completely misleading message on missing card:
------------------------>8-----------------------
Loading Environment from FAT... Card did not respond to voltage select!
------------------------>8-----------------------

we now get very clear one:
------------------------>8-----------------------
Loading Environment from FAT... MMC: no card present
------------------------>8-----------------------
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Since gd->cpu_clk is a global item we may once populate it from .dtb
ans use it then in other places like for printing CPU info etc.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

It is done by writing some magic sequence in a special register.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

ARC IDENTITY register only encodes major architecture
type and version while for a particular board/silicon we
may know better which template was used and so we may identify
CPU more precise, which exactly we do here.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

This allows board to override print_cpuinfo() because
they might know better which ARChitect template was used.
This way we may not only derive base architecture type and
version but more meaningful things like "ARC EM7D" instead of
simple "ARC EM", "ARC HS36" instead of "ARC HS".
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

There's no Ethernet controller on the board so no point in having
networking support. This also saves us 5.5 kB of precious memory.

| # bloat-o-meter u-boot.net u-boot.no_net_regex | tail -1
| Total: Before=127892, After=122334, chg -4.35%
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

We need to #ifdef some variables to avoid warning about them being
unused.

Fixes: 1a048cd6 ("driver: net: fsl-mc: Add support of multiple phys for dpmac")
Signed-off-by: NTom Rini <trini@konsulko.com>

NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has
manufacturer id as 0x2C, which are rather for newer flashes
after the split of Micron from ST.

So macro for this micron manufacturer id.
Signed-off-by: NSuresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: NYogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
[jagan: updated commit message]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Till now we have had cases where we had one phy device per dpmac.
Now, with the upcoming products (LX2160AQDS), we have cases, where there
are sometimes two phy devices for one dpmac. One phy for TX lanes and
one phy for RX lanes. to handle such cases, add the support for multiple
phys in ethernet driver. The ethernet link is up if all the phy devices
connected to one dpmac report link up. also the link capabilities are
limited by the weakest phy device.

i.e. say if there are two phys for one dpmac. one operates at 10G without
autoneg and other operate at 1G with autoneg. Then the ethernet interface
will operate at 1G without autoneg.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

The dpmac initalization should not depend on phy.
As the phy is not necessary to be present for dpmac to function.
Therefore, remove dpmac initialization dependency from phy.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

when there is no phy present for a dpmac, a dummy phy device is created.
when we move to multiple phy method, we need to create as many dummy phy
devices.

Change this method so that we don't need to create dummy phy devices.
We always report linkup if no phy is present.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

if an error occurs during init_phy, we should free the phydev structure
which has been allocated by phy_connect.
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

The phydev structure is present in both ldpaa_eth_priv and
wriop_dpmac_info. the phydev in wriop_dpmac_info is not being used

As the phydev is created based on phy_addr and bus members of
wriop_dpmac_info, it is appropriate to keep phydev in wriop_dpmac_info.

Also phy_regs is not being used, therefore remove it
Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Test improvements to tidy up output and drop duplicate tests
Sandbox SPL/TPL support
Various dm-related improvements

Remove the function prototypes duplicated between u-boot.arm.h
and init.h/common.h
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

The interruption support had be removed for ARM architecture and
the function get_timer_masked() is no more used except in some
the timer.c files.

This patch clean each timer.c which implement this function and
remove the associated prototype in u-boot-arm.h

For timer.c, I don't verify if the weak version of get_timer
(in lib/time.c) can be used
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

The interruption support had be removed for ARM architecture and
the function udelay_masked() is no more used except in some timer.c
files  and have the same content than udelay() or __udelay().

This patch update each timer.c implementing this function and
remove the associated prototype in u-boot-arm.h.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Remove prototype for function only used in one file
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Remove prototype for no more existing function
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>

Add board-specific hook which is executed before the code hands over
control to the OS. This lets the board perform some last-minute clean
ups.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Read the boot mode register to find the boot mode. Only use eMMC boot0
mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
to current conflating of boot mode and boot device), and not iff the
boot device is MMC port 0.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>