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  1. 14 8月, 2017 1 次提交
  3. 12 8月, 2017 3 次提交
  5. 10 8月, 2017 1 次提交
  7. 09 8月, 2017 1 次提交
  9. 01 8月, 2017 1 次提交
  11. 26 7月, 2017 1 次提交
    • S
      Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig · 2be29653
      由 Simon Glass 提交于 
      This converts the following to Kconfig:
   CONFIG_ENV_IS_IN_MMC
   CONFIG_ENV_IS_IN_NAND
   CONFIG_ENV_IS_IN_UBI
   CONFIG_ENV_IS_NOWHERE

In fact this already exists for sunxi as a 'choice' config. However not
all the choices are available in Kconfig yet so we cannot use that. It
would lead to more than one option being set.

In addition, one purpose of this series is to allow the environment to be
stored in more than one place. So the existing choice is converted to a
normal config allowing each option to be set independently.

There are not many opportunities for Kconfig updates to reduce the size of
this patch. This was tested with

   ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC

And then manual updates.  This is because for CHAIN_OF_TRUST boards they
can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic
now.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Rini <trini@konsulko.com>
      2be29653
  13. 04 6月, 2017 1 次提交
  15. 23 5月, 2017 1 次提交
  17. 15 5月, 2017 1 次提交
  19. 12 10月, 2016 2 次提交
  21. 17 9月, 2016 1 次提交
  23. 26 4月, 2016 3 次提交
  25. 19 11月, 2015 1 次提交
  27. 13 8月, 2015 1 次提交
  29. 26 6月, 2015 1 次提交
  31. 05 3月, 2015 1 次提交
  33. 14 1月, 2015 2 次提交
  35. 06 1月, 2015 1 次提交
  37. 05 12月, 2014 1 次提交
  39. 27 10月, 2014 1 次提交
  41. 31 8月, 2014 1 次提交
  43. 31 7月, 2014 1 次提交
  45. 30 7月, 2014 1 次提交
  47. 26 7月, 2014 1 次提交
    • P
      ARM: omap: clean redundant PISMO_xx macros used in OMAP3 · 222a3113
      由 pekon gupta 提交于 
      PISMO_xx macros were used to define 'Platform Independent Storage MOdule'
related GPMC configurations. This patch
- Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided
  by current u-boot infrastructure.
- Removes unused redundant macros, which are no longer required after
  merging of common platform code in following commit
      commit a0a37183
      ARM: omap: merge GPMC initialization code for all platform

+-----------------+-----------------------------------------------------------+
| Macro           | Reason for removal                                        |
+-----------------+-----------------------------------------------------------+
| PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE                        |
+-----------------+-----------------------------------------------------------+
| PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE                         |
+-----------------+-----------------------------------------------------------+
| PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE                      |
+-----------------+-----------------------------------------------------------+
| PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so     |
|                 | configuring GPMC chip-select for smallest allowable       |
|                 | segment (GPMC_SIZE_16M) is enough.                        |
+-----------------+-----------------------------------------------------------+
| PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of    |
|                 | 128MB (GPMC_SIZE_128M)                                    |
+-----------------+-----------------------------------------------------------+
+-----------------+-----------------------------------------------------------+
| PISMO1_NOR      |  Unused Macros                                            |
| PISMO1_NAND     |                                                           |
| PISMO2_CS0      |                                                           |
| PISMO2_CS1      |                                                           |
| PISMO1_ONENAND  |                                                           |
| PISMO2_NAND_CS0 |                                                           |
| PISMO2_NAND_CS1 |                                                           |
| PISMO1_NOR_BASE |                                                           |
| PISMO1_NAND_BASE|                                                           |
| PISMO2_CS0_BASE |                                                           |
+-----------------+-----------------------------------------------------------+
Signed-off-by: NPekon Gupta <pekon@ti.com>
      222a3113
  49. 07 6月, 2014 1 次提交
    • P
      mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width · b80a6603
      由 pekon gupta 提交于 
      GPMC controller needs to be configured based on bus-width of the NAND device
connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI
parameters is not possible in following situations:
SPL:    SPL NAND drivers does not support ONFI parameter reading.
U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init()
        which is called before probing for devices, hence any ONFI parameter
        information is not available during GPMC initialization.

Thus, OMAP NAND driver expected board developers to explicitely write GPMC
configurations specific to NAND device attached on board in board files itself.
But this was troublesome for board manufacturers as they need to dive into
lengthy platform & SoC documents to find details of GPMC registers and
appropriate configurations to get NAND device working.

This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config
hich indicates that connected NAND device has x16 bus-width. And then based on
this config GPMC driver itself initializes itself based on NAND bus-width. This
keeps board developers free from knowing GPMC controller specific internals.
Signed-off-by: NPekon Gupta <pekon@ti.com>
      b80a6603
  51. 05 3月, 2014 1 次提交
    • P
      mtd: nand: omap: remove unused #defines from common omap_gpmc.h · a7e36fc9
      由 pekon gupta 提交于 
      OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
params or nand_id[] table. And based on that it defines ECC layout.
This patch
1) removes following board configs used for defining NAND ECC layout
	- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
	- GPMC_NAND_ECC_LP_x8_LAYOUT  (for large page x8 NAND)
	- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
	- GPMC_NAND_ECC_SP_x8_LAYOUT  (for small page x8 NAND)

2) removes unused #defines in common omap_gpmc.h depending on above configs

Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: NPekon Gupta <pekon@ti.com>
      a7e36fc9
  53. 22 11月, 2013 1 次提交
    • P
      mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme · 3f719069
      由 pekon gupta 提交于 
      This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
CONFIG_xx used for selecting NAND ecc-schemes.
This patch aims at solving following issues.

1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
   other ecc-schemes also supported in hardware. like;
 - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
   the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
   software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
 - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
   supports BCH16 ecc-scheme also.

2) Different platforms use different CONFIG_xx to select ecc-schemes, which
   adds confusion for user while migrating platforms.
 - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
    8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
    whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
    and BCH16 (in future).
 - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
    correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
 - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library

Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
on SoC platform and NAND driver. And user can select ecc-scheme independently
foreach board.
However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)
Signed-off-by: NPekon Gupta <pekon@ti.com>
      3f719069
  55. 13 11月, 2013 1 次提交
    • H
      i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework · 6789e84e
      由 Heiko Schocher 提交于 
      - add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver

Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/Signed-off-by: NHeiko Schocher <hs@denx.de>
Tested-by: NTom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S  <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Acked-by: NStefano Babic <sbabic@denx.de>
      6789e84e
  57. 05 11月, 2013 1 次提交
  59. 15 10月, 2013 2 次提交
  61. 15 8月, 2013 1 次提交
  63. 24 7月, 2013 1 次提交
  65. 08 6月, 2013 1 次提交