setup_boot_mode function use the same logic but different
mode register address across all the rockchip platforms,
so it's better to make this function reused across all the
platforms, and let the mode register address setting from
the config file.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

There still are a few CONFIG_SPL_* options selected using defines from
rk3188_common.h instead of via Kconfig.  This migrates those over to
Kconfig.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it.  There already is a series to
support this in review, so this prepares the (newly C-version) of the
back-to-bootrom code to accept a cmd to passed on to the BROM.

All the existing call-sites are adjusted to match the changed function
signature.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: NAndy Yan <andy.yan@rock-chips.com>

For the RK3188, the BROM will attempt to load up the first stage
image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
in the SRAM and then the remainder to offset 0xc00 in the SRAM.
It always enters at 0x804, though.

With this changeset, the RK3188 boot removes the TPL (stub) stage and
builds a single SPL binary that utilizes the early back-to-bootrom via
the boot0-hook.

Consequently, the passing of the saved boot params via pmu->os_reg[2]
is also removed.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there was little reason to
have this as an assembly implementation.

This provides a new C-only implementation of save_boot_params and
back_to_bootrom (relying on setjmp/longjmp) and removes the older
assembly-only implementation.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: NAndy Yan <andy.yan@rock-chips.com>

The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers.  One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.

To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: NAndy Yan <andy.yan@rock-chips.com>

As no '.type' was set for save_boot_params_ret in start.S, binutils
did not track whether it was emitted as A32 or T32.  By properly
marking save_boot_params_ret as a potential function entry, we can
make sure that the compiler will insert the appropriate instructions
for branching to save_boot_params_ret both for call-sites emitted as
A32 and T32.
Reported-by: NAndy Yan <andy.yan@rock-chips.com>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: NAndy Yan <andy.yan@rock-chips.com>

The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C), was
previously only defined for !defined(CONFIG_ARM64).

This moves the declaration to a common block to ensure the prototype
is available to everyone that might need it.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: NAndy Yan <andy.yan@rock-chips.com>

Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Then, following a return to bootrom, the
BROM loads additional code to SRAM (not overwriting the first block read) and
reenters at the same address as the first time.

To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
this model of having to count entries, this commit adds code to the boot0
hook to track the number of entries and handle them accordingly.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: NPaweł Jarosz <paweljarosz3691@gmail.com>
Tested-by: NAndy Yan <andy.yan@rock-chips.com>

This updates the BCM281xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This updates the BCM235xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Version-changes: 5
- ran 'whitespace-cleanup'

With the updated boot0 semantics (i.e. giving the boot0-hook control
over when and where the vector table is emitted), the boot0-hook for
the socfpga needs to be adjusted.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
  instruction load and running by bootrom;

Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:]
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.

To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
  (1) if a boot0-hook is present it is inserted at the start of
      the image
  (2) if a boot0-hook is present, emitting the ARM vector table
      (and the _start) symbol are suppressed in vectors.S and
      the boot0-hook has full control over where and when it
      wants to emit these
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Configure thermal configs to remain set by default for dra7xx and am57xx
devices.
Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Mark bandgap node as uboot,dm-spl so that it can be accessed in spl
Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>

Add a driver for the I2C controller available on Amlogic Meson SoCs.
Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com>

UARTs 1 through 5 were missing in the code - added.
Also pick the default according to the configuration setting for the
console index.
Signed-off-by: NRonald Landheer-Cieslak <ronaldlandheercieslak@eaton.com>

Tag CPU with dm-pre-reloc to enable driver before
relocation.
Signed-off-by: NGan, Yau Wai <yau.wai.gan@intel.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: NMarek Vasut <marex@denx.de>

Save the environment data at the end of the boot partition on emmc
Signed-off-by: NJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

We need to update gd in assamble code after relocate,
this is a fix to:
adc421e4 arm: move gd handling outside of C code
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This is required in the case where U-Boot is typically loaded and run at
a particular address, but for some reason the RAM at that location is not
available, e.g. due to memory fragmentation loading other boot binaries or
firmware, splitting an SMP complex between various different OSs without
using e.g. the EL2 second-stage page tables to hide the memory asignments,
or due to known ECC failures.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>

Currently, pylibfdt is always compiled if swig is installed on your
machine.  It is really annoying because most of targets (excepts
x86, sunxi, rockchip) do not use dtoc or binman.

"checkbinman" and "checkdtoc" are wrong.  It is odd that the final
build stage checks if we have built necessary tools.  If your platform
depends on dtoc/binman, you must be able to build pylibfdt.  If swig
is not installed, it should fail immediately.

I added PYLIBFDT, DTOC, BINMAN entries to Kconfig.  They should be
property select:ed by platforms that need them.  Kbuild will descend
into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This adds platform code for the Amlogic P212 reference board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

This initial submission only supports UART and MMC/SDCard, support for the
internal Ethernet PHY in Work In Progress.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NBeniamino Galvani <b.galvani@gmail.com>

Synchronize the Amlogic ARM64 dts from mainline Linux 4.13.5

In the preparation of the support of the Amlogic P212 board,
import the corresponding meson-gxl-s905x-p212.dts file.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NBeniamino Galvani <b.galvani@gmail.com>

For the DM TPS65910 driver I'm working on, querying the MPU voltage
should return a value in uV. This value can then be used by the
regulator's standard function set_value to set the MPU voltage.
Signed-off-by: NFelix Brack <fb@ltec.ch>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>

We borrow the macros for these functions from ARM and remove references
to '__raw_'.
Signed-off-by: NTom Rini <trini@konsulko.com>

All current ClearFog SOMs have the SPI flash populated. Enable SPI flash in
the device tree.

Add an alias to the SPI bus so that the 'sf' command can probe the flash on
bus 1.

Add the "spi-flash" compatible string to make the standard SPI flash driver
probe the device.
Reviewed-by: NJagan Teki <jagan@openedev.com>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NStefan Roese <sr@denx.de>

This fixes the USB 3.0 support for the a38x SOC.
Signed-off-by: NJon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t]
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NStefan Roese <sr@denx.de>

Value provided in MC_MEM_SIZE_ENV_VAR is in hex. Use 16 as base
in simple_strtoul.
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: NRaghav Dogra <raghav.dogra@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NRaghav Dogra <raghav.dogra@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NAmrita Kumari <amrita.kumari@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The eMMC is 1V8 device only and the signaling is always 1V8,
fix the DT for Salvator-X/XS to describe the hardware correctly.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Signed-off-by: NLukasz Majewski <lukma@denx.de>

Signed-off-by: NLukasz Majewski <lukma@denx.de>