Add UART base addresses for additional UARTs

UARTs 1 through 5 were missing in the code - added.
Also pick the default according to the configuration setting for the
console index.
Signed-off-by: NRonald Landheer-Cieslak <ronaldlandheercieslak@eaton.com>

arch/arm/include/asm/arch-am33xx/hardware.h

@@ -53,7 +53,19 @@
 #define DDR_CONTROL_BASE_ADDR		0x44E11404
 
 /* UART */
-#define DEFAULT_UART_BASE		UART0_BASE
+#if CONFIG_CONS_INDEX == 1
+#	define DEFAULT_UART_BASE UART0_BASE
+#elif CONFIG_CONS_INDEX == 2
+#	define DEFAULT_UART_BASE UART1_BASE
+#elif CONFIG_CONS_INDEX == 3
+#	define DEFAULT_UART_BASE UART2_BASE
+#elif CONFIG_CONS_INDEX == 4
+#	define DEFAULT_UART_BASE UART3_BASE
+#elif CONFIG_CONS_INDEX == 5
+#	define DEFAULT_UART_BASE UART4_BASE
+#elif CONFIG_CONS_INDEX == 6
+#	define DEFAULT_UART_BASE UART5_BASE
+#endif
 
 /* GPMC Base address */
 #define GPMC_BASE			0x50000000

arch/arm/include/asm/arch-am33xx/hardware_am33xx.h

@@ -15,6 +15,11 @@
 
 /* UART Base Address */
 #define UART0_BASE			0x44E09000
+#define UART1_BASE			0x48022000
+#define UART2_BASE			0x48024000
+#define UART3_BASE			0x481A6000
+#define UART4_BASE			0x481A8000
+#define UART5_BASE			0x481AA000
 
 /* GPIO Base address */
 #define GPIO2_BASE			0x481AC000