This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:

- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.

- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).

To produce this update I used tag v3.7.1 of linux-stable repository.

The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.
Signed-off-by: NSergey Lapin <slapin@ossfans.org>
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: NScott Wood <scottwood@freescale.com>

Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT.
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>

When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop
will loop forever.
After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l
will still be 0 as expected.
Signed-off-by: NTao Hou <hotforest@gmail.com>
Cc: Ben Gardiner <bengardiner@nanometrics.ca>
Cc: Scott Wood <scottwood@freescale.com>

When writelen is mtd->writesize - 1, it is still a partial page write
Signed-off-by: NTao Hou <hotforest@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>

This avoids needing a separate U-Boot config when some revisions
of a board have small-page NAND and other revisions have large-page
NAND (except for NAND SPL targets).

CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and
it gets in the way of this change.
Signed-off-by: NScott Wood <scottwood@freescale.com>

The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:

Commit 7b43db92
drivers/mmc/fsl_esdhc.c: fix compiler warnings
Signed-off-by: NHaijun Zhang <Haijun.Zhang@freescale.com>
CC: Sun Yusong-R58495 <yorksun@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.

It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.
Signed-off-by: NKuo-Jung Su <dantesu@faraday-tech.com>
CC: Andy Fleming <afleming@gmail.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.

Remove the code to avoid wasting maitaining efforts on dead stuff.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>

The mpc85xx repuires a special layout on the memory device that is
connected to the eSDHC controller interface. But the file spl_mmc.c
didn't handle this specfic case, there needs a special treatmen, in
the powerpc drictory. So, there is no longer to keep spl_mmc.c on
mpc85xx, CONFIG_SPL_FRAMEWORK is not set.

When CONFIG_SPL_MMC_SUPPORT is set and CONFIG_SPL_FRAMEWORK is not
set, there was an error in drivers/mmc/spl_mmc.c:

drivers/mmc/libmmc.o:(.got2+0x8): undefined reference to `spl_image'.

Now, the solution is to move the file "spl_mmc.c" to directory "common/spl".
Signed-off-by: NYing Zhang <b40530@freescale.com>

If timeout is occurred at the while loop above,
the value of 'timeout' is -1, not 0.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY
initialization can be reused in kernel without  “usb start” command.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

- set proper compatible property name for mEMAC.
- fixed ft_fixup_port for dual-role mEMAC, which will lead to
  MAC node disabled incorrectly.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

T4160 SoC is low power version of T4240. The T4160 combines eight dual
threaded Power Architecture e6500 cores and two memory complexes (CoreNet
platform cache and DDR3 memory controller) with the same high-performance
datapath acceleration, networking, and peripheral bus interfaces.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

T4240 internal UTMI phy is different comparing to previous UTMI PHY
in P3041.
This patch adds USB 2.0 UTMI Dual PHY new memory map and enable it for
T4240.
The phy timing is very sensitive and moving the phy enable code to
cpu_init.c will not work.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

1. fix 10G mac offset by plus 8;
2. add second 10G port info for FM1 & FM2 when init ethernet info;
3. fix 10G lanes name to match lane protocol table;
Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Added the LAN9730 to list of supported devices. This chip is used
in the sEVM, uEVM and som5_evb. Tested on the som5_evb with dhcp
and ping.
Signed-off-by: NLubomir Popov <lpopov@mm-sol.com>

The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx.
A lot of machine macros are used to accomodate both code in one gpio driver.
This patch split the old gpio driver and move new gpio2 support to the generic
gpio driver folder.

- To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's
config header file.
- The gpio2 driver supports bf54x, bf60x and future ADI processors, while the
older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561.
- All blackfin specific gpio function names are replaced by the generic gpio APIs.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>

Signed-off-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>

- Move blackfin serial driver to the generic driver folder.
- Move blackfin serial headers to blackfin arch head folder.
- Update the include path to blackfin serial header in start up code.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>

- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>

There may be dirty data in RDBR, so we should discard invalid data.
This operation also clears RXS bit in STAT register.
Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>

BF5xx rx dma causes spi flash random read error.
Accually spi controller has problems both on tx and rx dma.
So remove spi dma support in u-boot.
Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>

Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.

Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.

There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.

Adding several gpios IP is also possible and supported.

For listing gpio configuration please use "gpio status" command

This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
 may be undefined [-Wsequence-point]
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

A malloc() followed by memset() can be simply replaced by calloc().
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

If failed the add_host(), it is reasonable that return value of
add_sdhci().
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Signed-off-by: NVipin Kumar <vipin.kumar@st.com>
Acked-by: NStefan Roese <sr@denx.de>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Without this additional delay, some eMMC don't negotiate properly bus width
Tested on:
 - Toshiba THGBM2G8D8FBAIB
 - Toshiba THGBM4G4D1HBAR
 - Micron MTFC4GMVEA (the one giving the problem)
 - Hynix H26M64002BNR
 - SanDisk SDIN5E1-32G
Signed-off-by: NDavide Bonfanti <davide.bonfanti@bticino.it>
Acked-by: NTom Rini <trini@ti.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Most of time that MMC driver spends on initializing a device is polling
OCR (operation conditions register).  To decouple this polling loop,
device init is split into two parts: The first part fires the OCR query
command, and the second part polls the result.  So the caller is now no
longer bound to the OCR-polling delay; he may fire the query, go
somewhere and then come back later for the result.

To use this, call mmc_set_preinit() on any device which needs this.

This can save significant amounts of time on boot (e.g. 200ms) by
hiding the MMC init time behind other init.
Signed-off-by: NChe-Liang Chiou <clchiou@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

We can use a common global method for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Acked-by: NTom Rini <trini@ti.com>

The at91sam9g10 need to configure HCK0 to make OHCI work
Signed-off-by: NBo Shen <voice.shen@atmel.com>

This patch adds a new 'usb test' command, that will set a port to a USB
2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
on both downstream hub ports and ordinary device's upstream ports. In
addition, it supports EHCI root hub ports.
Signed-off-by: NJulius Werner <jwerner@chromium.org>

Add ehci_get_port_speed() and ehci_set_usbmode() weak functions
for platform driver to support new chip.
Signed-off-by: NJim Lin <jilin@nvidia.com>

Some legacy RGMII phys don't have in band signaling for the
speed information. so set the RGMII MAC mode according to
the speed got from PHY.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Reported-by: NJohn Traill <john.traill@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Delete all occurrences of hang() and provide a generic function.
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Acked-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
[trini: Modify check around puts() in hang.c slightly]
Signed-off-by: NTom Rini <trini@ti.com>

log2 of the device block size serves as the shift value used to calculate
the block number to read in file systems when implementing avaiable block
sizes.
It is needed quite often in file systems thus it is pre-calculated and
stored in the block device descriptor.
Signed-off-by: NEgbert Eich <eich@suse.com>

The number 512 appears quite a bit in the mmc code. Add a constant for this
so that it can be used here and in other parts of the code (e.g. SPL code
which loads from mmc).
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NVadim Bendebury <vbendeb@google.com>

block_read returns unsigned long, so it doesn't make sense to check for
< 0. and neither does marking the header structure as const and then
casting away the constness to load data into it.

Also cleanup some unneeded pointer casting while we're at it.
Signed-off-by: NPeter Korsgaard <peter.korsgaard@barco.com>
Reviewed-by: NTom Rini <trini@ti.com>

Watchdog can be used on Microblaze, PPC and Zynq hw designs.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NTom Rini <trini@ti.com>

Support to check whether the SD3.0 or not.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NRommel Custodio <sessyargc@gmail.com>