- 27 6月, 2017 1 次提交
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由 Bin Meng 提交于
This reverts commit ddb3ac3c. With MMC converted to driver model, SCSI driver is broken due to zero address access at (ops->read) in block_dread() function. The fix (SCSI driver converted to DM) is ready in u-boot-dm branch, but it is too late for this relese to get that in. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 23 6月, 2017 4 次提交
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由 Heiko Schocher 提交于
since commit: f8b7fff1 "serial: atmel_usart: Add clk support" corvus board comes not up anymore. Fix it. Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Lokesh Vutla 提交于
Now that we can specify DT nodes that can be used in spl, mark all necessary nodes as u-boot,dm-spl. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Lokesh Vutla 提交于
Now that we can specify DT nodes that can be used in spl, mark all necessary nodes as u-boot,dm-spl. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
It has been observed that between PG1.0 and PG2.0/2.1 depending on which device we boot from, we may see a different value here than is documented in the TRM. Update the values for NAND and MMC1 based on real life usage on each revision. Signed-off-by: NTom Rini <trini@konsulko.com>
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- 21 6月, 2017 2 次提交
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由 Tom Rini 提交于
On ARCH_SUNXI we've been selecting these targets for a long time if SUPPORT_SPL is set. However, Lichee Pi Zero is the first platform we've added that does support SPL but does not build SPL and has exposed a latent bug. Both of these symbols depend on SPL not SUPPORT_SPL, so we need to update our select here otherwise we get a Kconfig warning. Fixes: f02abb06 ("sunxi: add support for Lichee Pi Zero") Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Marek Vasut 提交于
Trivial, fix typo. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com>
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- 20 6月, 2017 6 次提交
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由 Mike Looijmans 提交于
The topic-miamilite SoM contains a Zynq xc7z010 SoC, 1GB DDR3L RAM, 64MB dual-parallel QSPI NOR flash and clock sources. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
If PMUFW version is not v0.3 then panic. ZynqMP switch to CCF based clock driver which requires PMUFW to be present at certain version. This patch ensure that you use correct and tested PMUFW binary. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Define routines of mmio write and read functionalities for zynqmp platform. Also do not call SMC from SPL because SPL is running before ATF in EL3 that's why SMCs can't be called because there is nothing to call. zynqmp_mmio*() are doing direct read/write accesses and this patch does the same. PMUFW is up and running at this time and there is a way to talk to pmufw via IPI but there is no reason to implement IPI stuff in SPL if we need just simple read for getting clock driver to work. Also make invoke_smc as global so that it can be reused in multile places where ever possible. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Add Kconfig option for ddr init as this might be required in cases like ddr less systems where we want to skip ddrc init and this option is useful for it. Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
When OCM or TCM is protected this mapping still exist and it is causing access violation. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Silicon v1 didn't support SD boot mode with level shifter. Because system can't boot any error message is not shown that's why comment is just a record if someone tries to debug it. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 19 6月, 2017 4 次提交
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由 Jean-Francois Dagenais 提交于
The boot_device argument to spl_boot_mode was massively added without actually modifying the existing functions. This commit actually makes use of the handed value, which is the same. Signed-off-by: NJean-Francois Dagenais <jeff.dagenais@gmail.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Jean-Francois Dagenais 提交于
When enabling both SDHCI controllers, spl_mmc.c would actually choose device sdhci0 even if booted from sdhci1 (boot_device). This is because spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in order to return index 1 instead of 0. The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c So the key to properly enabling both controllers as boot sources is defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's include/configs/*.h. Signed-off-by: NJean-Francois Dagenais <jeff.dagenais@gmail.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add missing SD boot mode to SPL. zcu102-rev1.0 is supporting this boot mode. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Adding more targets to repository requires some additional changes not simply just adding config file, defconfig and dts. This patch makes this process easier by building only particular DTB which is selected via defconfig that Makefile doesn't need to contain all dts files in the repository. Reported-by: NNathan Rossi <nathan@nathanrossi.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 16 6月, 2017 3 次提交
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由 Heiko Schocher 提交于
There was for long time no activity in the mpx5xxx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in mpc5xxx, so remove it. Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Andrew F. Davis 提交于
Secure boot targets that can be loaded from an SD card FAT partition need to be called "MLO" on the filesystem, make a copy with this name to clarify the correct image for SD card booting. Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 14 6月, 2017 4 次提交
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由 Jagan Teki 提交于
NanoPi NEO2 is designed and developed by FriendlyElec using the Allwinner 64-bit H5 SOC. NanoPi Neo2 key features - Allwinner H5, Quad-core 64-bit Cortex-A53 - 512MB DDR3 RAM - microSD slot - 10/100/1000M Ethernet - Serial Debug Port - 5V 2A DC MicroUSB power-supply Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Tom Rini 提交于
It turns out this change was not intended to be merged and as such, revert it. This reverts commit cdde7de0. Reported-by: NManfred Schlaegl <manfred.schlaegl@ginzinger.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Jagan Teki 提交于
Orangepi Win/WinPlus is an open-source single-board computer using the Allwinner A64 SOC. A64 Orangepi Win/WinPlus has - A64 Quad-core Cortex-A53 64bit - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM - Debug TTL UART - Four USB 2.0 - HDMI - LCD - Audio and MIC - Wifi + BT - IR receiver - 5V DC power supply Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Zero Plus 2 has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG+power supply Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Tested-by: NJagan Teki <jagan@amarulasolutions.com>
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- 13 6月, 2017 2 次提交
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由 Stephen Warren 提交于
Whistler is an ancient Tegra 2 reference board. I may have been the only person who ever used it with upstream software, and I've just recycled the board hardware. Hence, it makes sense to remove support from software. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 York Sun 提交于
Drop support for these two legacy boards. Signed-off-by: NYork Sun <york.sun@nxp.com>
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- 12 6月, 2017 11 次提交
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由 Cooper Jr., Franklin 提交于
With Davinci I2C switching to device model, K2HK requires U-boot specific device tree entries. This is only required for I2C 1 which is needed extremely early during the boot process. Fixes: 1743d040 ("ARM: keystone: Enable DM_I2C by default") Reported-by: NYan Liu <yan-liu@ti.com> Signed-off-by: NFranklin S Cooper Jr <fcooper@ti.com>
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由 Lothar Waßmann 提交于
Create exception stack in IRAM if available to facilitate debugging of pre-relocation code by catching exceptions rather than stopping dead. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
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由 Lothar Waßmann 提交于
Adjust the program counter register to point to the failing instruction depending on the exeption type. This makes it easier to localize the offending instruction leading to a fatal exception. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
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由 Lothar Waßmann 提交于
The cp_delay() function was introduced because of a missing 'volatile' attribute to the 'asm' statement in get_cr() which led to the 'mrc' instruction in get_cr() being optimised out eventually. This has been fixed in commit 53fd4b8c ("arm: mmu: Add missing volatile for reading SCTLR register") but the bogus cp_delay() function which was introduced as a workaround for the malfunctioning get_cr() was never removed. Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
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由 Patrice Chotard 提交于
stm32x7.c driver is dedicated for STM32F7. In kernel, "st,stm32-usart" and "st,stm32-uart" compatible strings are dedicated for STM32F4. To keep U-boot and kernel aligned, replace the serial compatible string from "st,stm32-usart", "st,stm32-uart" to "st,stm32f7-usart", "st,stm32f7-uart" specific for STM32F7. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Reviewed-by: NChristophe KERELLO <christophe.kerello@st.com> Reviewed-by: NPatrick DELAUNAY <patrick.delaunay@st.com> Acked-by: NVikas MANOCHA <vikas.manocha@st.com>
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由 Heiko Schocher 提交于
There was for long time no activity in the 5xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 5xx, so remove it. Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Heiko Schocher 提交于
There was for long time no activity in the 8260 area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 8260, so remove it. Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Heiko Schocher 提交于
There was for long time no activity in the 8xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 8xx, so remove it (with a heavy heart, knowing that I remove here the root of U-Boot). Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Semen Protsenko 提交于
This patch reuses new option, which allows us to expose variables from environment to "fastboot getvar" command. Those variables must be of "fastboot.%s" format. Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org>
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由 Manfred Schlaegl 提交于
Using u-boot-2017.05 on i.MX6UL we ran into following problem: Initially U-Boot could be started normally. If we added one random command in configuration, the newly generated image hung at startup (last output was DRAM: 256 MiB). We tracked this down to a data abort within relocation (relocated_code). relocated_code in arch/arm/lib/relocate.S copies 8 bytes per loop iteration until the source pointer is equal to __image_copy_end. In a good case __image_copy_end was aligned to 8 bytes, so the loop stopped as suggested, but in an errornous case __image_copy_end was not aligned to 8 bytes, so the loop ran out of bounds and caused a data abort exception. This patches solves the issue by aligning __image_copy_end to 8 byte using the linker script related to arm. I don't know if it's the correct way to solve this, so some review would be very appreciated.
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由 Chen-Yu Tsai 提交于
Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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- 10 6月, 2017 3 次提交
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由 tnishinaga.dev@gmail.com 提交于
Disable D-Cache is required when booting nommu Linux kernel. (please see Linux kernel source "arch/arm/kernel/head-nommu.S") U-Boot is enabled D-cache and I-Cache at startup. However, it does not disable D-Cache before booting nommu Linux kernel. Therefore, I call dcache_disable() when the CPU is ARMv7M to fix this problem. Signed-off-by: NToshifumi NISHINAGA <tnishinaga.dev@gmail.com>
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由 Semen Protsenko 提交于
Refactor OMAP3/4/5 code so that we have only one get_device_type() function for all platforms. Details: - Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for OMAP4/5), so we can obtain status register in common way - For now ctrl structure for AM33xx/OMAP3 contains only status register address - Run hw_data_init() in order to assign ctrl to proper structure - Remove DEVICE_MASK and DEVICE_GP definitions as they are not used (DEVICE_TYPE_MASK and GP_DEVICE are used instead) - Guard structs in omap_common.h with #ifdefs, because otherwise including omap_common.h on non-omap4/5 board files breaks compilation Buildman script was run for all OMAP boards. Result output: arm: (for 38/616 boards) all +352.5 bss -1.4 data +3.5 rodata +300.0 spl/u-boot-spl:all +284.7 spl/u-boot-spl:data +2.2 spl/u-boot-spl:rodata +252.0 spl/u-boot-spl:text +30.5 text +50.4 (no errors to report) Tested on AM57x EVM and BeagleBoard xM. Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org> Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> [trini: Rework the guards as to not break TI81xx] Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
Almost all users of CONFIG_AM33XX/AM43XX have been migrated. Finish moving the last few over to Kconfig, and put all of the boards under the appropriate Kconfig chocie now. This board choice is non-optional, so remove that keyword on am33xx. Signed-off-by: NTom Rini <trini@konsulko.com>
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