- 14 8月, 2007 26 次提交
-
-
由 Peter Pearse 提交于
Merge to two at45.c files into a common file, split to at45.c and spi.c Fix spelling error in DM9161 PHY Support. Initialize at91rm9200 board (and set LED). Add PIO control for at91rm9200dk LEDs and Mux. Change dataflash partition boundaries to be compatible with Linux 2.6. Signed-off-by: NPeter Pearse <peter.pearse@arm.com> Signed-off-by: NUlf Samuelsson <ulf@atmel.com>
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
-
由 Wolfgang Denk 提交于
-
由 Randy Vinson 提交于
The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
-
由 Andy Fleming 提交于
Author: Randy Vinson <rvinson@linuxbox.(none)> Enable the PCI-to-ISA bridge in the VIA Southbridge located on the Arcadia main board. Signed-off-by: NRandy Vinson <rvinson@mvista.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
-
由 Andy Fleming 提交于
Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
-
由 Haiying Wang 提交于
This patch is against u-boot-mpc85xx.git of www.denx.com Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NEbony Zhu <ebony.zhu@freescale.com>
-
由 Haiying Wang 提交于
This patch is against u-boot-mpc85xx.git of www.denx.com Setting cpo to 0x9 for frequencies higher than 333MHz is verified on both MPC8548CDS board and MPC8568MDS board, especially for supporting 533MHz DDR2. Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for DDR2 on all current board versions especially ver 1.92 or later to bring up. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com>
-
由 Kumar Gala 提交于
On e500 when we leave the 4k boot page we should use an absolute address since we don't know where the board code may want us to be really running at. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
-
由 Andy Fleming 提交于
The current implementation does not set the number of bank address bits (BA) in the processor. The default assumes 2 logical bank bits. This works fine for a DIMM that uses devices with 4 internal banks (SPD byte17 = 0x4) but needs to be set appropriately for a DIMM that uses devices with 8 internal banks (SPD byte17 = 0x8). Signed-off-by: NGreg Davis <DavisG@embeddedplanet.com>
-
由 Andy Fleming 提交于
Some patches had inserted warnings into the build: * mpc8560ads declared data without using it * cpu_init declared ecm and immap without using it in all CONFIGs * MPC8548CDS.h had its default filenames changed so that they contained "\m" in the paths. Made the defaults not Windows-specific (or anything-specific) Signed-off-by: NAndy Fleming <afleming@freescale.com>
-
由 Ed Swarthout 提交于
Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
-
由 Ed Swarthout 提交于
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address. Enable LBC and ECM errors and clear error registers. Add tftpflash env var to get uboot from tftp server and flash it. Add pci/pcie convenience env vars to display register space: "run pcie3regs" to see all pcie3 ccsr registers "run pcie3cfg" to see all cfg registers Whitespace cleanup and MPC8544DS.h Enable CONFIG_INTERRUPTS. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
-
由 Andy Fleming 提交于
From: Ed Swarthout <Ed.Swarthout@freescale.com> Support external interrupts from platform to eliminate system hangs. Define CONFIG_INTERRUPTS board configure option to enable. Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC. Remove extra cpu initialization redundant with hardware initialization. Whitespace cleanup. Define and use _START_OFFSET consistent with other processors using ppc_asm.tmpl Move additional code from .text to boot page to make room for exception vectors at start of image. Handle Machine Check, External and Critical exceptions. Fix e500 machine check error determination in traps.c TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
-
由 Andy Fleming 提交于
Signed-off-by: NAndy Fleming <afleming@freescale.com>
-
由 Ed Swarthout 提交于
Only check for mpc8548 rev 1 when compiled for 8548. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
-
由 Ed Swarthout 提交于
Allow debugger to override flash cs0/cs1 settings to enable alternate boot regions Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
-
由 Ed Swarthout 提交于
Always define MCK_EXCEPTION macro - so e500 can use it too. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com>
-
由 David Updegraff 提交于
Implemented IETF RFC2090, Multicast TFTP. Initial implementation on Realtek RTL8139 and Freescale TSEC. Signed-off-by: NDavid Updegraff <dave@cray.com> Signed-off-by: NBen Warren <bwarren@qstreams.com>
-
由 Wilson Callan 提交于
Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different from the bootp server Signed-off-by: NWilson Callan <wcallan@savantav.com> Signed-off-by: NBen Warren <bwarren@qstreams.com>
-
由 Mike Rapoport 提交于
Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NBen Warren <bwarren@qstreams.com>
-
由 Ben Warren 提交于
Merge git://www.denx.de/git/u-boot Conflicts: drivers/bcm570x.c drivers/tigon3.c
-
由 Wolfgang Denk 提交于
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Jon Loeliger 提交于
Conflicts: MAKEALL With any luck, this is the last MAKEALL merge conflict!
-
- 13 8月, 2007 10 次提交
-
-
由 Joe Hamman 提交于
PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT adapter. Signed-off-by: NJoe Hamman <joe.hamman@embeddedspecialties.com> Signde-off-by: NJon Loeliger <jdl@freescale.com>
-
由 Haavard Skinnemoen 提交于
Calculate the data timeout based on values from the CSD instead of just using a hardcoded DTOR value. This is a backport of a similar fix in BSP 2.0, with one additional fix: the DTOCYC value is rounded up instead of down. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
-
由 Haavard Skinnemoen 提交于
include/asm-avr32/div64.h was recently moved to include/div64.h, but cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of the patch was merged perhaps?) This patch updates cpu/at32ap/interrupts.c so that the avr32 port compiles again. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
-
由 Haavard Skinnemoen 提交于
-
由 Haavard Skinnemoen 提交于
Instead of always using the largest blocksize the card supports, check if it can support smaller block sizes and use 512 bytes if possible. Most cards do support this, and other parts of u-boot seem to have trouble with block sizes different from 512 bytes. Also enable underrun/overrun protection. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
-
由 Wolfgang Denk 提交于
-
由 Wolfgang Denk 提交于
Also update CHANGELOG Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
Signed-off-by: Wolfgang Denk
-
-
- 12 8月, 2007 3 次提交
-
-
由 Wolfgang Denk 提交于
The update procedure was modified to turn off the USB subsystem before exit for MCC200 and TRAB. This is necessary as otherwise the USB controller continues to write periodically to system memory! MCC200-specific notes: - the patch disables the magic key check for MCC200 - the patch contains the configuration changes made for the new revision of the board. Signed-off-by: NSergei Poselenov <sposelenov@emcraft.com> Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
-
由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
-
- 11 8月, 2007 1 次提交
-
-
由 Wolfgang Denk 提交于
-