- 20 1月, 2007 1 次提交
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由 Heiko Schocher 提交于
if you must swap the bytes between reading/writing. (Needed for the SC3 board) Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 18 1月, 2007 1 次提交
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由 Heiko Schocher 提交于
The EBC Configuration Register is now by CFG_EBC_CFG definable Added JFFS2 support for the SC3 board. Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 17 1月, 2007 1 次提交
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由 Wolfgang Denk 提交于
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- 16 1月, 2007 1 次提交
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由 Wolfgang Denk 提交于
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- 15 1月, 2007 4 次提交
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由 Wolfgang Denk 提交于
Some code cleanup.
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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- 14 1月, 2007 1 次提交
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 13 1月, 2007 8 次提交
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
Haiying Wang's modification to the reset command was broken, undo it. Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Stefan Roese 提交于
Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
Now the board revision and the current PCI bus speed are printed after the board message. Signed-off-by: NStefan Roese <sr@denx.de>
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- 11 1月, 2007 1 次提交
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de>
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- 10 1月, 2007 6 次提交
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由 Reinhard Thies 提交于
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由 Detlev Zundel 提交于
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
The invocation of do_auto_update() is moved to the end of the misc_init_r() function, after the flash mappings have been initialized. Please find attached a patch that implements that change. Also correct the decoding of the keypad status. With this update, the key that will trigger the update is Column 2, Row 2.
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由 Marian Balakowicz 提交于
- use CFI driver (replaces custom flash driver) for main 'cam5200' target - add second build target 'cam5200_niosflash' which still uses custom driver
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- 09 1月, 2007 11 次提交
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
generation of hardware
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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由 Markus Klotzbuecher 提交于
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- 07 1月, 2007 1 次提交
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由 Wolfgang Denk 提交于
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- 06 1月, 2007 2 次提交
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由 Stefan Roese 提交于
This patch fixes a problem with an incorrect setup for the refresh timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This update brings the ALPR board support to the newest version. It also fixes a problem with the NAND driver. Signed-off-by: NStefan Roese <sr@denx.de>
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- 05 1月, 2007 2 次提交
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由 Stefan Roese 提交于
Here the description from Brian Brelsford <Brian_Brelsford@dell.com>: The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part returns a 0x15. In the code fragment below bits [1:0] determine the page size, it is ANDed via "(extid & 0x3)" then shifted out. The next field is also ANDed with 0x3. However this is a one bit field as defined in the Hynix and Samsung parts in the 4th ID byte that determins the oobsize, not a two bit field. It works on Samsung as bits[3:2] are 01. However for the Hynix there is a 11 in these two bits, so the oob size gets messed up. I checked the correct linux code and the suggested fix from Brian is also available in the linux nand mtd driver. Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
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