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体验新版 GitCode,发现更多精彩内容 >>
提交
b8a8bfc0
编写于
1月 13, 2007
作者:
W
Wolfgang Denk
提交者:
Wolfgang Denk
1月 13, 2007
浏览文件
操作
浏览文件
下载
差异文件
Merge with /home/sr/git/u-boot/denx-merge-sr
上级
c6676c73
44cd6de2
变更
7
隐藏空白更改
内联
并排
Showing
7 changed file
with
81 addition
and
45 deletion
+81
-45
board/amcc/sequoia/sequoia.c
board/amcc/sequoia/sequoia.c
+7
-0
board/amcc/yellowstone/yellowstone.c
board/amcc/yellowstone/yellowstone.c
+7
-18
board/amcc/yosemite/yosemite.c
board/amcc/yosemite/yosemite.c
+7
-18
cpu/ppc4xx/cpu.c
cpu/ppc4xx/cpu.c
+24
-4
include/asm-ppc/processor.h
include/asm-ppc/processor.h
+8
-5
include/configs/yellowstone.h
include/configs/yellowstone.h
+14
-0
include/configs/yosemite.h
include/configs/yosemite.h
+14
-0
未找到文件。
board/amcc/sequoia/sequoia.c
浏览文件 @
b8a8bfc0
...
...
@@ -350,12 +350,19 @@ int misc_init_r(void)
int
checkboard
(
void
)
{
char
*
s
=
getenv
(
"serial#"
);
u8
rev
;
u8
val
;
#ifdef CONFIG_440EPX
printf
(
"Board: Sequoia - AMCC PPC440EPx Evaluation Board"
);
#else
printf
(
"Board: Rainier - AMCC PPC440GRx Evaluation Board"
);
#endif
rev
=
*
(
u8
*
)(
CFG_CPLD
+
0
);
val
=
*
(
u8
*
)(
CFG_CPLD
+
5
)
&
0x01
;
printf
(
", Rev. %X, PCI=%d MHz"
,
rev
,
val
?
66
:
33
);
if
(
s
!=
NULL
)
{
puts
(
", serial# "
);
puts
(
s
);
...
...
board/amcc/yellowstone/yellowstone.c
浏览文件 @
b8a8bfc0
...
...
@@ -39,24 +39,6 @@ int board_early_init_f(void)
reg
=
mfdcr
(
ebccfgd
);
mtdcr
(
ebccfgd
,
reg
|
0x04000000
);
/* Set ATC */
mtebc
(
pb0ap
,
0x03017300
);
/* FLASH/SRAM */
mtebc
(
pb0cr
,
0xfc0da000
);
/* BAS=0xfc0 64MB r/w 16-bit */
mtebc
(
pb1ap
,
0x00000000
);
mtebc
(
pb1cr
,
0x00000000
);
mtebc
(
pb2ap
,
0x04814500
);
/*CPLD*/
mtebc
(
pb2cr
,
0x80018000
);
/*BAS=0x800 1MB r/w 8-bit */
mtebc
(
pb3ap
,
0x00000000
);
mtebc
(
pb3cr
,
0x00000000
);
mtebc
(
pb4ap
,
0x00000000
);
mtebc
(
pb4cr
,
0x00000000
);
mtebc
(
pb5ap
,
0x00000000
);
mtebc
(
pb5cr
,
0x00000000
);
/*--------------------------------------------------------------------
* Setup the GPIO pins
*-------------------------------------------------------------------*/
...
...
@@ -190,8 +172,15 @@ int misc_init_r (void)
int
checkboard
(
void
)
{
char
*
s
=
getenv
(
"serial#"
);
u8
rev
;
u8
val
;
printf
(
"Board: Yellowstone - AMCC PPC440GR Evaluation Board"
);
rev
=
*
(
u8
*
)(
CFG_CPLD
+
0
);
val
=
*
(
u8
*
)(
CFG_CPLD
+
5
)
&
0x01
;
printf
(
", Rev. %X, PCI=%d MHz"
,
rev
,
val
?
66
:
33
);
if
(
s
!=
NULL
)
{
puts
(
", serial# "
);
puts
(
s
);
...
...
board/amcc/yosemite/yosemite.c
浏览文件 @
b8a8bfc0
...
...
@@ -39,24 +39,6 @@ int board_early_init_f(void)
reg
=
mfdcr
(
ebccfgd
);
mtdcr
(
ebccfgd
,
reg
|
0x04000000
);
/* Set ATC */
mtebc
(
pb0ap
,
0x03017300
);
/* FLASH/SRAM */
mtebc
(
pb0cr
,
0xfc0da000
);
/* BAS=0xfc0 64MB r/w 16-bit */
mtebc
(
pb1ap
,
0x00000000
);
mtebc
(
pb1cr
,
0x00000000
);
mtebc
(
pb2ap
,
0x04814500
);
/*CPLD*/
mtebc
(
pb2cr
,
0x80018000
);
/*BAS=0x800 1MB r/w 8-bit */
mtebc
(
pb3ap
,
0x00000000
);
mtebc
(
pb3cr
,
0x00000000
);
mtebc
(
pb4ap
,
0x00000000
);
mtebc
(
pb4cr
,
0x00000000
);
mtebc
(
pb5ap
,
0x00000000
);
mtebc
(
pb5cr
,
0x00000000
);
/*--------------------------------------------------------------------
* Setup the GPIO pins
*-------------------------------------------------------------------*/
...
...
@@ -186,8 +168,15 @@ int misc_init_r (void)
int
checkboard
(
void
)
{
char
*
s
=
getenv
(
"serial#"
);
u8
rev
;
u8
val
;
printf
(
"Board: Yosemite - AMCC PPC440EP Evaluation Board"
);
rev
=
*
(
u8
*
)(
CFG_CPLD
+
0
);
val
=
*
(
u8
*
)(
CFG_CPLD
+
5
)
&
0x01
;
printf
(
", Rev. %X, PCI=%d MHz"
,
rev
,
val
?
66
:
33
);
if
(
s
!=
NULL
)
{
puts
(
", serial# "
);
puts
(
s
);
...
...
cpu/ppc4xx/cpu.c
浏览文件 @
b8a8bfc0
...
...
@@ -332,24 +332,44 @@ int checkcpu (void)
strcpy
(
addstr
,
"No Security/Kasumi support"
);
break
;
case
PVR_440SP_RA
:
puts
(
"SP Rev. A"
);
case
PVR_440SP_6_RAB
:
puts
(
"SP Rev. A/B"
);
strcpy
(
addstr
,
"RAID 6 support"
);
break
;
case
PVR_440SP_RB
:
puts
(
"SP Rev. B"
);
case
PVR_440SP_RAB
:
puts
(
"SP Rev. A/B"
);
strcpy
(
addstr
,
"No RAID 6 support"
);
break
;
case
PVR_440SP_6_RC
:
puts
(
"SP Rev. C"
);
strcpy
(
addstr
,
"RAID 6 support"
);
break
;
case
PVR_440SP_RC
:
puts
(
"SP Rev. C"
);
strcpy
(
addstr
,
"No RAID 6 support"
);
break
;
case
PVR_440SPe_6_RA
:
puts
(
"SPe Rev. A"
);
strcpy
(
addstr
,
"RAID 6 support"
);
break
;
case
PVR_440SPe_RA
:
puts
(
"SPe Rev. A"
);
strcpy
(
addstr
,
"No RAID 6 support"
);
break
;
case
PVR_440SPe_6_RB
:
puts
(
"SPe Rev. B"
);
strcpy
(
addstr
,
"RAID 6 support"
);
break
;
case
PVR_440SPe_RB
:
puts
(
"SPe Rev. B"
);
strcpy
(
addstr
,
"No RAID 6 support"
);
break
;
default:
...
...
include/asm-ppc/processor.h
浏览文件 @
b8a8bfc0
...
...
@@ -747,11 +747,14 @@
#define PVR_440GX_RC 0x51B21892
#define PVR_440GX_RF 0x51B21894
#define PVR_405EP_RB 0x51210950
#define PVR_440SP_RA 0x53221850
#define PVR_440SP_RB 0x53221891
#define PVR_440SP_RC 0x53221892
#define PVR_440SPe_RA 0x53421890
#define PVR_440SPe_RB 0x53421891
#define PVR_440SP_6_RAB 0x53221850
/* 440SP rev A&B with RAID 6 support enabled */
#define PVR_440SP_RAB 0x53321850
/* 440SP rev A&B without RAID 6 support */
#define PVR_440SP_6_RC 0x53221891
/* 440SP rev C with RAID 6 support enabled */
#define PVR_440SP_RC 0x53321891
/* 440SP rev C without RAID 6 support */
#define PVR_440SPe_6_RA 0x53421890
/* 440SPe rev A with RAID 6 support enabled */
#define PVR_440SPe_RA 0x53521890
/* 440SPe rev A without RAID 6 support */
#define PVR_440SPe_6_RB 0x53421891
/* 440SPe rev B with RAID 6 support enabled */
#define PVR_440SPe_RB 0x53521891
/* 440SPe rev B without RAID 6 support */
#define PVR_601 0x00010000
#define PVR_602 0x00050000
#define PVR_603 0x00030000
...
...
include/configs/yellowstone.h
浏览文件 @
b8a8bfc0
...
...
@@ -301,6 +301,20 @@
*/
#define CFG_BOOTMAPSZ (8 << 20)
/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup
*----------------------------------------------------------------------*/
#define CFG_FLASH CFG_FLASH_BASE
#define CFG_CPLD 0x80000000
/* Memory Bank 0 (NOR-FLASH) initialization */
#define CFG_EBC_PB0AP 0x03017300
#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
/* Memory Bank 2 (CPLD) initialization */
#define CFG_EBC_PB2AP 0x04814500
#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
/*-----------------------------------------------------------------------
* Cache Configuration
*/
...
...
include/configs/yosemite.h
浏览文件 @
b8a8bfc0
...
...
@@ -306,6 +306,20 @@
*/
#define CFG_BOOTMAPSZ (8 << 20)
/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup
*----------------------------------------------------------------------*/
#define CFG_FLASH CFG_FLASH_BASE
#define CFG_CPLD 0x80000000
/* Memory Bank 0 (NOR-FLASH) initialization */
#define CFG_EBC_PB0AP 0x03017300
#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
/* Memory Bank 2 (CPLD) initialization */
#define CFG_EBC_PB2AP 0x04814500
#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000)
/*-----------------------------------------------------------------------
* Cache Configuration
*/
...
...
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