This add phylib support to the Marvell GBE driver.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

This adds PHY initialization for Marvell Alaska 88E1310 PHY.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Add ipappend support to pass network device information to the kernel.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Not all boards define an SOC.  As a result, we can't depend on that.

This was introduced in 39f98553Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

A pxelinux server setup for "default" menu is typically an x86 binary.
This does not work well with a mixed architecture setup. Extend the default
search to look for default-<arch>-<soc> and then default-<arch> before
falling back to just "default".
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

ontimeout is similar to default, but is the selection on menu timeout.
This is how cobbler sets a default. The label default is supposed to be
the default selection when <enter> is pressed. If both default and
ontimeout are set, last one parsed wins.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Menus with lots of entries and long append lines are hard to read.
Just show a numbered list using the label or name and make the choice
by entering the number.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

The prompt flag is for displaying a "boot:" prompt in pxelinux. This
doesn't make sense for u-boot as we don't support the pxelinux command
interface. So we should just ignore prompt statements and always show the
menu if a menu is present.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Standard pxelinux servers will typically use a zImage rather than u-boot
image format, so fallback to bootz if bootm fails.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Make do_bootz available for other functions like do_bootm is.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Add support for value of -1 For localboot. A value of -1 means return to
u-boot prompt.

The localboot value is often 0, so we need to distinguish the value from
localboot being selected. A value of greater than or equal to 0 means
attempt local boot command.

If localboot is selected, we don't want to try other entries.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Convert a bunch of string parameters to be const.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Get the MAC address using eth_getenv_enetaddr_by_index so that the MAC
address of ethact is used. This enables using the a NIC other than the
first one for PXE boot.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

The driver code was taken from Linux kernel source:
drivers/net/phy/icplus.c
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>

Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>

This patch adds support for the WEMAC, the ethernet controller included
in the Allwinner A10 SoC. It will get used in the upcoming A10 board
support.

From: Stefan Roese <sr@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net>

When use checkpatch.pl to check network related patch, it will report
--->8---
WARNING: networking block comments don't use an empty /* line,
use /* Comment...
---<8---

So, add --ignore NETWORKING_BLOCK_COMMENT_STYLE into .checkpatch.conf
This will help to keep all driver include network related driver use
the same comment style
Signed-off-by: NBo Shen <voice.shen@atmel.com>

Use section symbols directly
Drop support for R_ARM_ABS32 record types
Eliminate unneeded intermediate registers
Optimize relocation table iteration
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

This change is only done where needed: some linker
scripts may contain relocation symbols yet remain
unchanged.

__rel_dyn_start and __rel_dyn_end each requires
its own output section; putting them in relocation
sections changes their flags and breaks relocation.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

This change is only done where needed: some linker
scripts may contain __image_copy_{start,end} yet
remain unchanged.

Also, __image_copy_end needs its own section; putting
it in relocation sections changes their flags and makes
relocation break.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

File arch/arm/lib/bss.c was initially defined for BSS only,
but is now going to also contain definitions for other
section-boundary-related symbols, so rename it for better
accuracy.

Also, remove useless 'used' attributes.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

Discard all .dynsym sections from linker scripts
Remove all __dynsym_start definitions from linker scripts
Remove all __dynsym_start references from the codebase

Note: this touches include/asm-generic/sections.h, which
is not ARM-specific, but actual uses of __dynsym_start
are only in ARM, so this patch can safely go through
the ARM repository.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

Add a Makefile target ('checkarmreloc') which
fails if the ELF binary contains relocation records
of types other than R_ARM_RELATIVE.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

P1023RDB Specification:
-----------------------
Memory subsystem:
   512MB DDR3 (Fixed DDR on board)
   64MB NOR flash
   128MB NAND flash

Ethernet:
   eTSEC1: Connected to Atheros AR8035 GETH PHY
   eTSEC2: Connected to Atheros AR8035 GETH PHY

PCIe:
   Three mini-PCIe slots

USB:
   Two USB2.0 Type A ports

I2C:
   AT24C08 8K Board EEPROM (8 bit address)
Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

init_tlbs() initialize all the TLB entries required for the system.

So disable DEBUG TLB entry before TLB entries initialization.
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

"pixis_reset help" command prints the message without a new line "\n",
which makes the prompt on the same line.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Instead of assuming that SYS_TEXT_BASE is 0xFFF80000 calculate the initial
pbl command offset by subtracting the image size from the top of the
24-bit address range. Also increase the size of the memory buffer to
accommodate a larger output image.
Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

If a variable is used as array subscript, it's valid value range is
0 ... ARRAY_SIZE -1.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Move the common makefile line shared by the SPL and non-SPL to the public area,
so that we can avoid excessive SPL symbols. Some of them will be used by the
SPL later.

This patch is on top of the patch "common/Makefile: Add new symbol
CONFIG_SPL_ENV_SUPPORT for environment in SPL".
Signed-off-by: NYing Zhang <b40530@freescale.com>
Acked-by: NTom Rini <trini@ti.com>
Acked-by: NTom Rini <trini@ti.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).

Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT
for environment in common/Makefile.
Signed-off-by: NYing Zhang <b40530@freescale.com>
Reviewed-by: NTom Rini <trini@ti.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

There will clear the BSS in the function clear_bss(), the reset address of
the BSS started from the __bss_start, and increased by four-byte increments,
finally stoped depending on the address is equal to the _bss_end. If the end
address __bss_end is not alignment to 4byte, it will be an infinite loop.

1. The reset action stoped depending on the reset address is greater
than or equal the end address of the BSS.
2. The end address of the BSS should be 4byte aligned. Because the reset unit
is 4 Bytes.

This patch is on top of the patch "powerpc/mpc85xx: support application
without resetvec segment in the linker script".
Signed-off-by: NYing Zhang <b40530@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM,
then jump to it to begin execution. After that, the SPL loads the final uboot
image into DDR, then jump to it to begin execution. The segment .resetvec in
the SPL and in final U-boot is useless.

So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application.
If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded
and the segment .bootpg is placed in the previous 4K of the segment .text.
Signed-off-by: NYing Zhang <b40530@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

PCIe TLB should be created with CONFIG_PCI defined
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Relax parameters to give address latching more time to setup.
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Erratum A-006593 is "Atomic store may report failure but still allow
the store data to be visible".

The workaround is: "Set CoreNet Platform Cache register CPCHDBCR0 bit
21 to 1'b1.  This may have a small impact on synthetic write bandwidth
benchmarks but should have a negligible impact on real code."
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Calculate reserved fields according to IFC bank count

1. Move csor_ext register behind csor register and fix res offset
2. Move ifc bank count to config_mpc85xx.h to support 8 bank count
3. Guard fsl_ifc.h with CONFIG_FSL_IFC macro to eliminate the compile
   error on some devices that does not have IFC controller.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

When a T4 board boots from SRIO or PCIE, it needs to finish these processes:
	1. Set all the cores in holdoff status.
	2. Set the boot location to one PCIE or SRIO interface by RCW.
	3. Set a specific TLB entry for the boot process.
	4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot.
	5. Set a specific TLB entry in order to fetch ucode and ENV from
	   master.
	6. Set a LAW entry with the TargetID one of the PCIE ports for
	   ucode and ENV.
	7. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIO_PCIE_BOOT_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

For more information about the feature of Boot from SRIO/PCIE, please
refer to the document doc/README.srio-pcie-boot-corenet.
Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

T4 can support the feature of Boot from SRIO/PCIE, and the macro
"CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature
when building the u-boot image.

You can get some description about this macro in README file, and for more
information about the feature of Boot from SRIO/PCIE, please refer to the
document doc/README.srio-pcie-boot-corenet.
Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

When a b4860qds board boots from SRIO or PCIE, it needs to finish these
processes:
	1. Set all the cores in holdoff status.
	2. Set the boot location to one PCIE or SRIO interface by RCW.
	3. Set a specific TLB entry for the boot process.
	4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot.
	5. Set a specific TLB entry in order to fetch ucode and ENV from
	   master.
	6. Set a LAW entry with the TargetID one of the PCIE ports for
	   ucode and ENV.
	7. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIO_PCIE_BOOT_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

For more information about the feature of Boot from SRIO/PCIE, please
refer to the document doc/README.srio-pcie-boot-corenet.
Signed-off-by: NLiu Gang <Gang.Liu@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>