arm: make __rel_dyn_{start, end} compiler-generated

This change is only done where needed: some linker
scripts may contain relocation symbols yet remain
unchanged.

__rel_dyn_start and __rel_dyn_end each requires
its own output section; putting them in relocation
sections changes their flags and breaks relocation.
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: NLubomir Popov <lpopov@mm-sol.com>
Tested-by: NJeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

arch/arm/cpu/ixp/u-boot.lds

@@ -60,10 +60,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;

arch/arm/cpu/u-boot.lds

@@ -62,10 +62,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;

arch/arm/lib/relocate.S

@@ -55,10 +55,8 @@ copy_loop:
 	/*
 	 * fix .rel.dyn relocations
 	 */
-	ldr	r2, _rel_dyn_start_ofs	/* r2 <- __rel_dyn_start local ofs */
-	add	r2, r2, r7		/* r2 <- SRC &__rel_dyn_start */
-	ldr	r3, _rel_dyn_end_ofs	/* r3 <- __rel_dyn_end local ofs */
-	add	r3, r3, r7		/* r3 <- SRC &__rel_dyn_end */
+	ldr	r2, =__rel_dyn_start	/* r2 <- SRC &__rel_dyn_start */
+	ldr	r3, =__rel_dyn_end	/* r3 <- SRC &__rel_dyn_end */
 fixloop:
 	ldr	r0, [r2]		/* r0 <- SRC location to fix up */
 	add	r0, r0, r9		/* r0 <- DST location to fix up */
@@ -88,9 +86,4 @@ relocate_done:
         bx        lr
 #endif
 
-_rel_dyn_start_ofs:
-	.word __rel_dyn_start - relocate_code
-_rel_dyn_end_ofs:
-	.word __rel_dyn_end - relocate_code
-
 ENDPROC(relocate_code)

arch/arm/lib/sections.c

@@ -39,3 +39,5 @@ char __bss_start[0] __attribute__((section(".__bss_start")));
 char __bss_end[0] __attribute__((section(".__bss_end")));
 char __image_copy_start[0] __attribute__((section(".__image_copy_start")));
 char __image_copy_end[0] __attribute__((section(".__image_copy_end")));
+char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start")));
+char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));

board/actux1/u-boot.lds

@@ -68,10 +68,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;

board/actux2/u-boot.lds

@@ -68,10 +68,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;

board/actux3/u-boot.lds

@@ -68,10 +68,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;

board/dvlhost/u-boot.lds

@@ -68,10 +68,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;

board/freescale/mx31ads/u-boot.lds

@@ -71,10 +71,18 @@ SECTIONS
 		*(.__image_copy_end)
 	}
 
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
 	.rel.dyn : {
-		__rel_dyn_start = .;
 		*(.rel*)
-		__rel_dyn_end = .;
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
 	}
 
 	_end = .;