- 14 4月, 2020 28 次提交
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由 Marek Behún 提交于
Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that MOX boards with 4 GB RAM are fully supported. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
In case when ARM Trusted Firmware changes the default address of PCIe regions (which can be done for devices with 4 GB RAM to maximize the amount of RAM the device can use) we add code that looks at how ATF changed the PCIe windows in the CPU Address Decoder and changes given device-tree blob accordingly. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
In order to support MOX boards with 2 GB or 4 GB RAM, we use the new Armada-3700 generic code for memory information structures. This is done by removing dram_init and dram_init_banksize from turris_mox.c, in order for the generic, weak definitions to be used. Also for boards with 4 GB RAM it is needed to increase CONFIG_NR_DRAM_BANKS to 2 in turris_mox_defconfig. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Currently on Armada-37xx the mem_map structure is statically defined to map first 2 GB of memory as RAM region, and system registers and PCIe region device region. This is insufficient for when there is more RAM or when for example the PCIe windows is mapped to another address by the CPU Address Decoder. In the case when the board has 4 GB RAM, on some boards the ARM Trusted Firmware can move the PCIe window to another address, in order to maximize possible usable RAM. Also the dram_init and dram_init_banksize looks for information in device-tree, and therefore different device trees are needed for boards with different RAM sizes. Therefore we add code that looks at how the ARM Trusted Firmware has configured the CPU Address Decoder windows, and then we update the mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank base addresses and sizes accordingly. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Move Armada-8k specific DRAM init code into armada-8k specific directory. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Sort #includes alphabetically, the only exception is common.h, which is included first in most parts of U-Boot. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Use macro MVEBU_REGISTER to access register addresses instead of hardcoded addresses. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Commit e8e9715d requires the USB3 regulator node to have the enable-active-high property for the regulator to work properly. The GPIO_ACTIVE_HIGH constant is not enough anymore. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Fixes: e8e9715d ("regulator: fixed: Modify enable-active-high...") Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
Patch Linux's device tree according to which Mox modules are connected. Linux's device tree has all possible Mox module nodes preprogrammed, but in disabled state. If MOX B, MOX F or MOX G module is present, this code enables the PCI node. For the network modules (MOX C, MOX D and MOX E) are present, the code enables corresponding ethernet and swtich nodes and DSA connections. For the SFP cage the SFP GPIO controller node and SFP node are also enabled. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
With recent changes to the mmc subsystem (chip detect code etc) update the sdhci node of the Turris Mox device tree. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Marek Behún 提交于
The SPI clock signal changes value when the SPI configuration register is configured. This can sometimes lead to the device misinterpreting the enablement of the SPI controller as actual clock tick. This can be solved by first setting the SPI CS1 pin from GPIO to SPI mode, and only after that writing the SPI configuration register. Signed-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Switch to explicitly using the Pro variant DT, which has been available since Linux 4.11. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Migrate the values for ENV_SIZE and ENV_OFFSET into board specific Kconfig defaults so they're more accessible for configuration. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Add reasonable default SPI offsets and ENV size when configured to boot from SPI flash. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Unify the location of DT selection into board_late_init instead of split between detection and static configuration paths. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately configured for SATA usage. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
While newer Linux kernels provide autoconfiguration of SFP, provide an option for setting in U-Boot Kconfig for use prior to booting. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Add a unique entry for ClearFog Base variant, reflected in the board name and adjusted SerDes topology. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Make the board version printed indicate the Pro variant default. Also adjust static name casing to match what is expected for EEPROM product name to share string constants. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Using a consistent hardcoded MAC address from the DTS file causes issues when using multiple devices on the same network segment. Instead rely on environment configuration or random generation. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Tested on Solidrun ClearFog Base. Table alignment was: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 3 | SATA1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | USB3 HOST0 | | 5 | 4 | SGMII2 | -------------------------------- After the change, it's correctly aligned as: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 5 | PCIe1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | PCIe2 | | 5 | 0 | SGMII2 | -------------------------------- Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Enable distro bootcmd support for additional SATA ports if enabled. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Joel Johnson 提交于
Include attempting to boot from SCSI (SATA) devices within generated board distro bootcmd environment. The reasoning for boot ordering is that MMC and USB are external and removable, while when a case is in use, replacing M.2 or mSATA drives requires disassembly. Therefore, to boot SCSI, [bootable] external media must be removed. If SCSI were placed before MMC or USB, then removing a bootable SCSI drive to enable MMC or USB booting would be more difficult. Signed-off-by: NJoel Johnson <mrjoel@lixil.net> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Chris Packham 提交于
Update the RTC (Read Timing Control) values for PCIe memory wrappers following an ERRATA (ERRATA# TDB). This means the PCIe accesses will used slower memory Read Timing, to allow more efficient energy consumption, in order to lower the minimum VDD of the memory. Will lead to more robust memory when voltage drop occurs (VDDSEG) The code is based on changes from Marvell's U-Boot, specifically: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/20cd2704072512de176e048970f2883db901674b https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/eb608a7c8dd0d42b87601a61b9c0cc5615ab94b2 https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c4af19ae2bf08cf6e450e741ce4f04d402a5cb6bSigned-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Josua Mayer 提交于
Support for sata devices via the scsi command is available and already enabled by default for the Clearfog Base and Pro. This change adds scsi to the list of boot targets used by distro-boot. Signed-off-by: NJosua Mayer <josua@solid-run.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Heinrich Schuchardt 提交于
The value of local variable ecc is immediately overwritten. So we can remove the first assignment. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Josip Kelecic 提交于
Sort the Armada series dts in the Makefile alphabetically prior to adding new board support. Signed-off-by: NJosip Kelečić <josip.kelecic@sartura.hr> Reviewed-by: NLuka Kovacic <luka.kovacic@sartura.hr> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Chris Packham 提交于
For some layouts it is necessary to adjust the CK_DELAY parameter to successfully complete DDR training. Add the ability to specify the CK_DELAY in the mv_ddr_topology_map. Signed-off-by: NChris Packham <judge.packham@gmail.com>
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- 13 4月, 2020 2 次提交
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由 Tom Rini 提交于
Pull in changes that have been pending in our 'next' branch. This includes: - A large number of CI improvements including moving to gcc-9.2 for all platforms. - amlogic, xilinx, stm32, TI SoC updates - USB and i2c subsystem updtaes - Re-sync Kbuild/etc logic with v4.19 of the Linux kernel. - RSA key handling improvements
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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- 12 4月, 2020 1 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx由 Tom Rini 提交于
- Fixes DDR initialization failure on PowerPC boards like P3041DS, P4080DS
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- 11 4月, 2020 9 次提交
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由 Tom Rini 提交于
- Further clean up and improve our Azure/GitLab/Travis CI loops
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由 Simon Glass 提交于
This takes ages to run single-threaded. Adjust it to use all available processors. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
It is a pain to have to set the CROSS_COMPILE environment variable when using test.py's --build option. It is possible to get this using the -A option from buildman. But it seems better to just use buildman to do the build when it is available. However using buildman adds a new dependency to the test system which we want to avoid. So leave the default as is and add a flag to make it use buildman. Note that most of these changes relate to test.py and the parts of the travis/gitlab/azure scripts which relate to running test and building a suitable U-Boot to run the tests on. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
It does not seem to be necessary to run buildman again to show errors, since any errors can be shown by the first invocation and there is only a single board being built. Update this to simplify the code, using the -e flag to make sure errors are shown. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
It seems unnecessary to read the exit code and then check it again. Drop this and just let the test.py provide the exit code directly. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Ensure that this SPL test runs on gitlab. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
We can use the -W flag to tell buildman to ignore warnings. Since we also have -E defined, compiler warnings are promoted to errors, so they will still cause a failure. But migration warnings of the form: ===================== WARNING ====================== This board does not use CONFIG_DM. CONFIG_DM will be compulsory starting with the v2020.01 release. Failure to update may result in board removal. See doc/driver-model/migration.rst for more info. will now be ignored. Signed-off-by: NSimon Glass <sjg@chromium.org> Fixes: 329f5ef5 (travis.yml: run buildman with option -E) Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Bash allows for variables to expand only if non-empty: $ var=test $ echo ${var:+"$var"} test $ echo ${var:+"-k $var"} -k test $ var= $ echo ${var:+"-k $var"} Use this feature to avoid the workaround. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
Avoid needing to know about the internal .bm-work directory, by passing the -w flag to buildman. This is not needed on travis since the -w flag is already used (from a previous patch). Drop the -P flag since this has no effect if -w is used. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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